Re: [PATCH v2] lscpu: RISC-V: Print ISA information in summary

[Andrew Jones <ajones@ventanamicro.com>]

On Tue, Mar 11, 2025 at 09:36:46PM +0530, Sunil V L wrote:
> The ISA information for RISC-V is important for understanding the
> different extensions supported by the CPU. Print the ISA information in
> the summary, with the Base ISA and single-letter extensions at the
> beginning, followed by multi-letter extensions sorted in alphabetical
> order. The information is the same as the cpuinfo information, except
> that underscores are replaced by spaces and multi-letter extensions are
> simply sorted instead of following any ISA string ordering rule.
> 
> The sample output below shows the difference between cpuinfo and lscpu.
> 
> cpuinfo output:
> isa             : rv64imafdch_zicbom_zicboz_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zawrs_zfa_zba_zbb_zbc_zbs_smaia_ssaia_sstc
> 
> lscpu output:
> ISA:                rv64imafdch smaia ssaia sstc zawrs zba zbb zbc zbs zfa zicbom zicboz zicntr zicsr zifencei zihintntl zihintpause zihpm
> 
> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
> ---
> Changes in v2:
> 	1) Format the ISA string instead of simply printing the same
> 	   from cpuinfo. (Feedback from Andrew Jones).
> ---
>  sys-utils/Makemodule.am   |  1 +
>  sys-utils/lscpu-cputype.c |  1 +
>  sys-utils/lscpu-riscv.c   | 57 +++++++++++++++++++++++++++++++++++++++
>  sys-utils/lscpu.c         |  5 ++++
>  sys-utils/lscpu.h         |  2 ++
>  sys-utils/meson.build     |  1 +
>  6 files changed, 67 insertions(+)
>  create mode 100644 sys-utils/lscpu-riscv.c
>

Reviewed-by: Andrew Jones <ajones@ventanamicro.com>