[PATCH 0/3] shared-mem: introduce page alignment restrictions

Sergio Lopez
2025-02-17T11:52:33Z

There's an incresing number of machines supporting multiple page sizes
and, on these machines, the host and a guest can be running with
different pages sizes.

In addition to this, there might be devices that have a required and/or
preferred page size for mapping memory.

In this series we extend the "Shared Memory Regions" with a subsection
explaining the posible existence of page alignment restrictions.

For the device to provide the page size information to the driver, we
need to extend the PCI and MMIO transports. For the former, we borrow
8 bits from the 16 bit padding in virtio_pci_cap to hold a page_shift
field which can be used to derive the page size by using the following
formula: (page_size = 1 << (page_shift + 12)).

For MMIO, we add a the SHMPageShift register at offset 0x0c4, also
holding the page_shift value. Since MMIO registers are 32 bit wide, we
could have asked the device to directly provide page_size instead of
page_shift, but seems reasonable to be consistent across transports.

Since accessing a new MMIO register could be interpreted by the device
as an error, this behavior is gated behind the newly introduced
VIRTIO_F_SHM_PAGE_SIZE feature bit.

An implementation of the changes proposed in this series has been
published as an RFC to the LKML, to be used as a reference:

https://lore.kernel.org/all/20250214-virtio-shm-page-size-v2-0-aa1619e6908b@redhat.com/

Sergio Lopez (3):
shared-mem: introduce page alignment restrictions
transport-pci: VIRTIO_F_SHM_PAGE_SIZE support
transport-mmio: VIRTIO_F_SHM_PAGE_SIZE

content.tex | 3 +++
shared-mem.tex | 7 +++++++
transport-mmio.tex | 8 ++++++++
transport-pci.tex | 10 +++++++++-
4 files changed, 27 insertions(+), 1 deletion(-)

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2.48.1