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From: Sergio Lopez <slp@redhat.com>
To: virtio-comment@lists.linux.dev
Cc: dmitry.osipenko@collabora.com, parav@nvidia.com, mst@redhat.com,
	Sergio Lopez <slp@redhat.com>
Subject: [PATCH v2 3/3] transport-mmio: introduce SHMPageShift register
Date: Mon, 31 Mar 2025 11:05:48 -0400	[thread overview]
Message-ID: <20250331150548.50595-4-slp@redhat.com> (raw)
In-Reply-To: <20250331150548.50595-1-slp@redhat.com>

Introduce the "SHMPageShift" register which, when read, returns the
page shift value that can be used to derive the page size value
supported by the shared memory regions in the device.

Signed-off-by: Sergio Lopez <slp@redhat.com>
---
 transport-mmio.tex | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/transport-mmio.tex b/transport-mmio.tex
index 94a93a1..042a82c 100644
--- a/transport-mmio.tex
+++ b/transport-mmio.tex
@@ -242,6 +242,14 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
     apply to the queue selected by writing to \field{QueueSel}.
   }
   \hline
+  \mmioreg{SHMPageShift}{Shared memory region page shift 8 bit long}{0x0c4}{R}{%
+    Reading from this register returns the page shift derived from the supported
+    page size for the memory region selected by the \field{SHMSel} register. The
+    page shift is derived from the page size by using this formula:
+    $page size = 1 << (page shift + 12)$.
+    See also \ref {sec:Basic Facilities of a Virtio Device / Shared Memory Regions / Page alignment restrictions}.
+  }
+  \hline
   \mmioreg{ConfigGeneration}{Configuration atomicity value}{0x0fc}{R}{
     Reading from this register returns a value describing a version of the device-specific configuration space (see \field{Config}).
     The driver can then access the configuration space and, when finished, read \field{ConfigGeneration} again.
-- 
2.49.0


      parent reply	other threads:[~2025-03-31 15:59 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-31 15:05 [PATCH v2 0/3] shared-mem: introduce page alignment restrictions Sergio Lopez
2025-03-31 15:05 ` [PATCH v2 1/3] " Sergio Lopez
2025-03-31 16:16   ` Michael S. Tsirkin
2025-03-31 16:40     ` Sergio Lopez Pascual
2025-04-01  9:14       ` Michael S. Tsirkin
2025-04-01  9:22         ` Parav Pandit
2025-04-01  9:33           ` Sergio Lopez Pascual
2025-04-01  9:37             ` Parav Pandit
2025-04-01 10:18               ` Michael S. Tsirkin
2025-04-02  9:04                 ` Parav Pandit
2025-04-01  9:26         ` Sergio Lopez Pascual
2025-04-01 10:09           ` Michael S. Tsirkin
2025-04-01 10:46             ` Sergio Lopez Pascual
2025-03-31 15:05 ` [PATCH v2 2/3] transport-pci: introduce page_shift field for SHM Sergio Lopez
2025-03-31 15:05 ` Sergio Lopez [this message]

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