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Tsirkin" To: Sergio Lopez Cc: virtio-comment@lists.linux.dev, dmitry.osipenko@collabora.com, parav@nvidia.com Subject: Re: [PATCH v3 0/3] shared-mem: introduce page alignment restrictions Message-ID: <20250402033354-mutt-send-email-mst@kernel.org> References: <20250331213711.63398-1-slp@redhat.com> Precedence: bulk X-Mailing-List: virtio-comment@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <20250331213711.63398-1-slp@redhat.com> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: vHVXbpDWQOPm9C8sWpN1Yy-vWBjTRf12fiy__2vRsp4_1743579455 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Mon, Mar 31, 2025 at 05:37:08PM -0400, Sergio Lopez wrote: > There's an incresing number of machines supporting multiple page sizes > and, on these machines, the host and a guest can be running with > different pages sizes. > > In addition to this, there might be devices that have a required and/or > preferred page size for mapping memory. > > In this series we extend the "Shared Memory Regions" with a subsection > explaining the posible existence of page alignment restrictions when > the VIRTIO_F_SHM_PAGE_SIZE feature has been negotiated. > > For the device to provide the page size information to the driver, we > need to extend the PCI and MMIO transports. For the former, we borrow > 8 bits from the 16 bit padding in virtio_pci_cap to hold a page_shift > field which can be used to derive the page size by using the following > formula: (page_size = 1 << (page_shift + 12)). > > For MMIO, we add a the SHMPageShift register at offset 0x0c4, also > holding the page_shift value. Since MMIO registers are 32 bit wide, we > could have asked the device to directly provide page_size instead of > page_shift, but seems reasonable to be consistent across transports. > > An implementation of the changes proposed in this series has been > published as an RFC to the LKML, to be used as a reference: > > https://lore.kernel.org/all/20250214-virtio-shm-page-size-v2-0-aa1619e6908b@redhat.com/ Can you explain the use a bit more please? - looks like this is exposed to userspace? but userspace can not be trusted not to violate the spec. how can that be sufficient to satisfy MUST requirements? what are these mappings and what are the alignment restrictions, in fact? Looking at that patch, I begin to suspect that while the spec patch talks about device mapping requests, it is actually the other way around: the restriction is on guest virtual to guest physical mappings? Does the feature affect other device types besides gpu, and how? > v3: > - Reintroduce the VIRTIO_F_SHM_PAGE_SIZE feature bit, but limit its > scope to page alignment restrictions, still exposing page shift > data in the transports unconditionally (thanks Michael S. Tsirkin) > - Adjust the feature bits to reflect we're using another one (thanks > Parav Pandit). > > v2: > - Remove the VIRTIO_F_SHM_PAGE_SIZE feature bit, exposing page_shift > in the transports unconditionally (thanks Parav Pandit). > - Didn't pick up R-b due to the significant change between revisions. > > Sergio Lopez (3): > shared-mem: introduce page alignment restrictions > transport-pci: introduce page_shift field for SHM > transport-mmio: introduce SHMPageShift register > > content.tex | 10 ++++++++-- > shared-mem.tex | 7 +++++++ > transport-mmio.tex | 8 ++++++++ > transport-pci.tex | 10 +++++++++- > 4 files changed, 32 insertions(+), 3 deletions(-) > > -- > 2.49.0