From: "Michael S. Tsirkin" <mst@redhat.com>
To: Parav Pandit <parav@nvidia.com>
Cc: Bill Mills <bill.mills@linaro.org>,
"virtio-comment@lists.linux.dev" <virtio-comment@lists.linux.dev>,
Bertrand Marquis <bertrand.marquis@arm.com>,
"Edgar E . Iglesias" <edgar.iglesias@amd.com>,
Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>,
Viresh Kumar <viresh.kumar@linaro.org>,
Alex Bennee <alex.bennee@linaro.org>,
Armelle Laine <armellel@google.com>
Subject: Re: [PATCH v1 0/4] virtio-msg transport layer
Date: Wed, 25 Feb 2026 04:22:27 -0500 [thread overview]
Message-ID: <20260225041945-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <SJ0PR12MB6806E3A4D9783E5DB5FA5EC4DC75A@SJ0PR12MB6806.namprd12.prod.outlook.com>
On Wed, Feb 25, 2026 at 09:18:58AM +0000, Parav Pandit wrote:
>
> > From: Michael S. Tsirkin <mst@redhat.com>
> > Sent: 25 February 2026 12:55 PM
> >
> > On Wed, Feb 25, 2026 at 05:09:45AM +0000, Parav Pandit wrote:
> > >
> > >
> > > > From: Michael S. Tsirkin <mst@redhat.com>
> > > > Sent: 20 February 2026 03:33 PM
> > > >
> > > > On Fri, Feb 20, 2026 at 06:13:55AM +0000, Parav Pandit wrote:
> > > > > > > 4. I dont find the transport messages to read and write to the driver memory supplied in VIRTIO_MSG_SET_VQUEUE addresses to
> > > > operate
> > > > > > the virtqueues.
> > > > > > > Dont we need VIRTIO_MEM_READ, VIRTIO_MEM_WRITE request and response?
> > > > > >
> > > > > > surely this can be an optional transport feature bit.
> > > > > >
> > > > > How is this optional?
> > > > > How can one implement a transport without defining the basic data transfer semantics?
> > > > > For example for TCP transporting, driver side OS is implementing header format foo, and device side is using header format bar.
> > > > > How does it work?
> > > >
> > > > I'm not sure what do foo/bar refer to, or what TCP transporting means.
> > > This proposal is subset of past proposal of [1].
> > >
> > > Proposal [1] covered transporting virtio control and data operations using something other than MMIO and PCI.
> > > And current proposal is similar, except that it didn't define the transport binding at all for the specific bus.
> > > It is only a partial 'control-transport'.
> > >
> > > [1] https://yhbt.net/lore/virtio-comment/20231023104647.290759-2-pizhenwei@bytedance.com/
> > >
> > > So foo and bar are the definitions I expect as listed in the patch-5 of [1].
> > > If it has to be done by the bus, lets write up this as 'control-transport'.
> > >
> > > > The simplest way to do TCP on top of virtio is to layer it above virtio
> > > > net. That uses VQs for data transfers.
> > > >
> > > The intention of this proposal is not to do TCP on top of virtio.
> > > The intention of this proposal is to do virtio on transports other than MMIO, PCI and channel.
> > > Such a transport can be anything - not defined in virtio spec.
> >
> > > It could be FFA, some two SoC as written in cover letter example, or it can be something else such as TCP or UDP or vsock or whatever else.
> >
> > I feel this "anything" is simply too broad a requirement.
> > I did not see any demand for virtio over TCP.
> > And, making it work with existing drivers will be a mess.
> Why would it be a mess? Because of load/store semantics?
> If so, would the message layer also faces the same challenge?
not sure what "the message layer" is.
> > We can scope this for buses that can do DMA for now.
> That looks reasonable good start.
> However, "Appendix C. Creating New Transports" needs modification.
>
> Following two likely needs to stay outside of the "control transport".
>
> A transport provides a mechanism for the device to send device notifications to the driver, such as used
> buffer notifications.
> A transport provides a mechanism for the driver to send driver notifications to the device, such as available
> buffer notifications.
Well existing transports sure do include these.
> We also need to fix the Appendix to describe about control transport and full transport.
> Current definition of Appendix C is listing MMIO And PCI transport, yet it misses virtqueue implementation by _full_ transport.
because they all share a single virtqueue implementation.
> >
> >
> >
> > >
> > > And hence, data transfer part must be scoped properly.
> > > Maybe I am yet to read this text in the 1600 lines of proposed patch...
> >
> >
> > Once we get into "support everything in the most abstract way possible"
> > we have already lost.
> Unlikely.
> Nvme over TCP is present since 2021.
> NVMe over RDMA is present since 2017.
> iSCSI over TCP is present from 2014.
> NFS ..
> List continues...
>
> The idea is to not define most abstract thing.
> The idea is to define the practical spec that cater to requirements already listed, including the TCP one in [1].
I don't object to virtio over TCP. just do not want to block this
work on that.
> > No one asked for virtio over carrier pigeons.
> CSP user already explained the use case of virtio over network transport in [1].
> Considering above many use cases already done on similar non virtio devices as pigeons is severe undermining the scope of virtio.
>
> One can say, I only want to engineer control transport ignoring needs of [1].
> However, we must have the doors and vision open so that users of [1] can also use it without creating yet another 'fabric transport'.
>
> At the same time, we must define the binding to the bus where it is going to be used for the DMA.
>
> For example, cover letter mentions about " between a host processor and its co-processors"
> And " between normal and secure worlds"
>
> How can one implement a driver if the bus driver does not know how to enumerate/discover it?
>
> In the proposed example, of host processor and co-processor if they are connected via Xenbus or AMBA bus,
> how should driver discover this device?
>
> If this bus binding is not part of the virtio spec, how can it be ever implemented and yet comply to the virtio spec?
> Can someone please explain this?
>
> I frankly expect an ARM FF-A bus binding transport section in virtio-spec.
> So that device and driver can inter-operate implemented by two different entities.
> Only virtio level messages do not seem sufficient.
I agree at least one should be shown at least as an rfc.
next prev parent reply other threads:[~2026-02-25 9:22 UTC|newest]
Thread overview: 105+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-26 16:32 [PATCH v1 0/4] virtio-msg transport layer Bill Mills
2026-01-26 16:32 ` [PATCH v1 1/4] virtio-msg: add new command for bus normative Bill Mills
2026-02-03 19:42 ` Edgar E. Iglesias
2026-01-26 16:32 ` [PATCH v1 2/4] virtio-msg: Add virtio-msg, a message based virtio transport layer Bill Mills
2026-02-06 16:28 ` Peter Hilber
2026-02-10 9:39 ` Bertrand Marquis
2026-02-12 11:16 ` Peter Hilber
2026-02-20 8:23 ` Bertrand Marquis
2026-02-26 13:53 ` Peter Hilber
2026-02-13 19:09 ` Demi Marie Obenour
2026-02-20 8:52 ` Bertrand Marquis
2026-02-21 2:04 ` Demi Marie Obenour
2026-02-23 7:44 ` Bertrand Marquis
2026-02-24 15:41 ` Demi Marie Obenour
2026-02-24 16:14 ` Bertrand Marquis
2026-02-24 17:36 ` Edgar E. Iglesias
2026-02-24 17:14 ` Demi Marie Obenour
2026-02-24 17:20 ` Bertrand Marquis
2026-02-24 17:46 ` Demi Marie Obenour
2026-02-25 7:26 ` Bertrand Marquis
2026-02-25 12:36 ` Demi Marie Obenour
2026-02-25 12:46 ` Bertrand Marquis
2026-01-26 16:32 ` [PATCH v1 3/4] virtio-msg: link virtio-msg content Bill Mills
2026-02-03 19:43 ` Edgar E. Iglesias
2026-01-26 16:32 ` [PATCH v1 4/4] virtio-msg: add conformance entries in conformance chapter Bill Mills
2026-02-03 19:43 ` Edgar E. Iglesias
2026-01-26 21:47 ` [PATCH v1 0/4] virtio-msg transport layer Demi Marie Obenour
2026-02-03 13:21 ` Michael S. Tsirkin
2026-02-03 19:48 ` Edgar E. Iglesias
2026-02-03 19:55 ` Michael S. Tsirkin
2026-02-04 8:33 ` Bertrand Marquis
2026-02-04 13:50 ` Arnaud POULIQUEN
2026-02-04 3:29 ` Viresh Kumar
2026-02-04 5:34 ` Manivannan Sadhasivam
2026-02-13 13:52 ` Parav Pandit
2026-02-13 19:45 ` Demi Marie Obenour
2026-02-19 17:31 ` Armelle Laine
2026-02-20 8:55 ` Bertrand Marquis
2026-02-19 23:54 ` Michael S. Tsirkin
2026-02-20 6:13 ` Parav Pandit
2026-02-20 9:02 ` Bertrand Marquis
2026-02-25 7:45 ` Manivannan Sadhasivam
2026-02-25 8:03 ` Bertrand Marquis
2026-02-25 8:12 ` Michael S. Tsirkin
2026-02-25 10:06 ` Manivannan Sadhasivam
2026-02-25 10:10 ` Michael S. Tsirkin
2026-02-25 10:14 ` Bertrand Marquis
2026-02-25 10:22 ` Michael S. Tsirkin
2026-02-25 10:53 ` Manivannan Sadhasivam
2026-02-25 10:24 ` Parav Pandit
2026-02-25 10:35 ` Bertrand Marquis
2026-02-25 10:52 ` Michael S. Tsirkin
2026-02-25 10:55 ` Bertrand Marquis
2026-02-25 10:58 ` Michael S. Tsirkin
2026-02-25 14:45 ` Parav Pandit
2026-02-25 14:49 ` Michael S. Tsirkin
2026-02-25 14:53 ` Bertrand Marquis
2026-02-25 15:00 ` Parav Pandit
2026-02-25 15:07 ` Parav Pandit
2026-02-25 15:12 ` Bertrand Marquis
2026-02-25 15:15 ` Michael S. Tsirkin
2026-02-25 15:36 ` Demi Marie Obenour
2026-02-25 15:40 ` Bertrand Marquis
2026-02-25 15:48 ` Demi Marie Obenour
2026-02-25 15:51 ` Bertrand Marquis
2026-02-25 16:15 ` Demi Marie Obenour
2026-02-26 5:40 ` Manivannan Sadhasivam
2026-02-26 7:05 ` Bertrand Marquis
2026-02-25 15:11 ` Manivannan Sadhasivam
2026-02-25 15:15 ` Parav Pandit
2026-02-26 5:36 ` Manivannan Sadhasivam
2026-02-26 5:59 ` Parav Pandit
2026-02-26 6:19 ` Manivannan Sadhasivam
2026-02-26 7:01 ` Bertrand Marquis
2026-02-26 7:28 ` Manivannan Sadhasivam
2026-02-26 19:20 ` Demi Marie Obenour
2026-02-26 22:08 ` Edgar E. Iglesias
2026-02-25 15:23 ` Demi Marie Obenour
2026-02-25 16:42 ` Edgar E. Iglesias
2026-02-25 12:53 ` Demi Marie Obenour
2026-02-25 13:09 ` Manivannan Sadhasivam
2026-02-25 13:12 ` Demi Marie Obenour
2026-02-25 13:29 ` Bertrand Marquis
2026-02-25 15:19 ` Demi Marie Obenour
2026-02-25 15:27 ` Bertrand Marquis
2026-02-20 10:03 ` Michael S. Tsirkin
2026-02-25 5:09 ` Parav Pandit
2026-02-25 7:25 ` Michael S. Tsirkin
2026-02-25 9:18 ` Parav Pandit
2026-02-25 9:22 ` Michael S. Tsirkin [this message]
2026-02-25 9:35 ` Bertrand Marquis
2026-02-25 9:54 ` Michael S. Tsirkin
2026-02-25 10:01 ` Bertrand Marquis
2026-02-25 10:08 ` Michael S. Tsirkin
2026-02-20 8:58 ` Bertrand Marquis
2026-02-20 8:40 ` Bertrand Marquis
2026-02-25 4:58 ` Parav Pandit
2026-02-25 7:52 ` Bertrand Marquis
2026-02-25 12:46 ` Demi Marie Obenour
2026-02-25 13:05 ` Bertrand Marquis
2026-02-25 13:09 ` Demi Marie Obenour
2026-02-25 15:17 ` Bertrand Marquis
2026-02-24 17:57 ` Demi Marie Obenour
2026-02-25 15:21 ` Alex Bennée
2026-02-25 15:46 ` Demi Marie Obenour
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