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Tsirkin" CC: , , , , , , , , , , , References: <20250820084944.84505-1-quic_haixcui@quicinc.com> <20250820084944.84505-3-quic_haixcui@quicinc.com> <20250821044351-mutt-send-email-mst@kernel.org> Content-Language: en-US From: Haixu Cui In-Reply-To: <20250821044351-mutt-send-email-mst@kernel.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: JNc3JO8P6yjod7406IohdMIl0tBhS0-h X-Proofpoint-ORIG-GUID: JNc3JO8P6yjod7406IohdMIl0tBhS0-h X-Authority-Analysis: v=2.4 cv=JJo7s9Kb c=1 sm=1 tr=0 ts=68ac2a8e cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=BIS7xV68lBtj0k_KtVcA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDAzMSBTYWx0ZWRfXzblrjuIjS2Lq EAZf3OLxHSfI7cHz5yXYS+00WawSGO8HZUaFkYJCdf6pRC4QAGNH7E/OV6sxLnUVNZtJxcMuGVQ 6o6Tbu5Ys4PoLXiDaKM5LCuS1fRDmsM2cFa+tE89/LnOLzmA5FPodNmWkbKIBquZVjEwxj+XFIA UX4OZs8PCYDmvzjotkgxBsmwgC4SqfaJnj8iHBKl91WEvDW4EjQlBRcrER+GTxzt/wEJ6I1Folq Nm7h4Xll9cHrGO2fWwBWg277l9k40Q9lqTwLIt+bmCkEg4EbcisslPxeYX85OKHReqxtRqSN8Td 2set/aPO7onzslwaebmfmxKhb4oBEyGESj5EFFNsnEIAaXc7DSoD6E/Jqca362I6ldznTiZGW4p xrZPUVJw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-25_04,2025-08-20_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 bulkscore=0 spamscore=0 impostorscore=0 malwarescore=0 clxscore=1011 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230031 On 8/21/2025 4:45 PM, Michael S. Tsirkin wrote: >> + >> +/* Sample data on trailing clock edge */ >> +#define VIRTIO_SPI_CPHA _BITUL(0) >> +/* Clock is high when IDLE */ >> +#define VIRTIO_SPI_CPOL _BITUL(1) >> +/* Chip Select is active high */ >> +#define VIRTIO_SPI_CS_HIGH _BITUL(2) >> +/* Transmit LSB first */ >> +#define VIRTIO_SPI_MODE_LSB_FIRST _BITUL(3) >> +/* Loopback mode */ >> +#define VIRTIO_SPI_MODE_LOOP _BITUL(4) > > It is generally preferable to have an enum with just bit > numbers. > > > E.g. > > enum { > VIRTIO_SPI_F_CPHA = 0, > } > > > Userspace can add _BITUL wrappers itself if it > wants. > > Hi Michael, Thank you for the suggestion regarding the bit definitions. Would it be acceptable to keep the current macro definitions with _BITUL() because these macros are also used within the virtio SPI driver itself? Looking forward to your guidance. Best regards, Haixu Cui