From: "Dr. David Alan Gilbert (git)" <dgilbert@redhat.com>
To: virtio-dev@lists.oasis-open.org,
virtio-comment@lists.oasis-open.org, stefanha@redhat.com,
cohuck@redhat.com
Cc: vgoyal@redhat.com
Subject: [virtio-comment] [PATCH v5 5/5] shared memory: Define mmio registers
Date: Thu, 27 Jun 2019 20:28:30 +0100 [thread overview]
Message-ID: <20190627192830.5285-6-dgilbert@redhat.com> (raw)
In-Reply-To: <20190627192830.5285-1-dgilbert@redhat.com>
From: "Dr. David Alan Gilbert" <dgilbert@redhat.com>
Define an MMIO interface to discover and map shared
memory regions.
Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
---
content.tex | 30 ++++++++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/content.tex b/content.tex
index fcf0d81..588b299 100644
--- a/content.tex
+++ b/content.tex
@@ -1732,6 +1732,33 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
selected by writing to \field{QueueSel}.
}
\hline
+ \mmioreg{SHMSel}{Shared memory id}{0x0ac}{W}{%
+ Writing to this register selects the shared memory region \ref{sec:Basic Facilities of a Virtio Device / Shared Memory Regions}
+ following operations on \field{SHMLenLow}, \field{SHMLenHigh},
+ \field{SHMBaseLow} and \field{SHMBaseHigh} apply to.
+ }
+ \hline
+ \mmiodreg{SHMLenLow}{SHMLenHigh}{Shared memory region 64 bit long length}{0x0b0}{0x0xb4}{R}{%
+ These registers return the length of the shared memory
+ region in bytes, as defined by the device for the region selected by
+ the \field{SHMSel} register. The lower 32 bits of the length
+ are read from \field{SHMLenLow} and the higher 32 bits from
+ \field{SHMLenHigh}. Reading from a non-existent
+ region (i.e. where the ID written to \field{SHMSel} is unused)
+ results in a length of -1.
+ }
+ \hline
+ \mmiodreg{SHMBaseLow}{SHMBaseHigh}{Shared memory region 64 bit long physical address}{0x0b8}{0x0xbc}{R}{%
+ The driver reads these registers to discover the base address
+ of the region in physical address space. This address is
+ chosen by the device (or other part of the VMM).
+ The lower 32 bits of the address are read from \field{SHMBaseLow}
+ with the higher 32 bits from \field{SHMBaseHigh}. Reading
+ from a non-existent region (i.e. where the ID written to
+ \field{SHMSel} is unused) results in a base address of
+ 0xffffffffffffffff.
+ }
+ \hline
\mmioreg{ConfigGeneration}{Configuration atomicity value}{0x0fc}{R}{
Reading from this register returns a value describing a version of the device-specific configuration space (see \field{Config}).
The driver can then access the configuration space and, when finished, read \field{ConfigGeneration} again.
@@ -1821,6 +1848,9 @@ \subsubsection{Device Initialization}\label{sec:Virtio Transport Options / Virti
and if its value is zero (0x0) MUST abort initialization and
MUST NOT access any other register.
+Drivers not expecting shared memory MUST NOT use the shared
+memory registers.
+
Further initialization MUST follow the procedure described in
\ref{sec:General Initialization And Device Operation / Device Initialization}~\nameref{sec:General Initialization And Device Operation / Device Initialization}.
--
2.21.0
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next prev parent reply other threads:[~2019-06-27 19:28 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-27 19:28 [virtio-comment] [PATCH v5 0/5] Large shared memory regions Dr. David Alan Gilbert (git)
2019-06-27 19:28 ` [virtio-comment] [PATCH v5 1/5] shared memory: Define " Dr. David Alan Gilbert (git)
2019-07-03 13:13 ` [virtio-comment] " Cornelia Huck
2019-06-27 19:28 ` [virtio-comment] [PATCH v5 2/5] pci: Define id field Dr. David Alan Gilbert (git)
2019-06-28 10:00 ` [virtio-comment] " Cornelia Huck
2019-06-28 13:36 ` [virtio-comment] Re: [virtio-dev] " Dr. David Alan Gilbert
2019-07-03 13:04 ` Cornelia Huck
2019-07-10 17:45 ` Dr. David Alan Gilbert
2019-06-27 19:28 ` [virtio-comment] [PATCH v5 3/5] pci: Define virtio_pci_cap64 Dr. David Alan Gilbert (git)
2019-06-28 10:02 ` [virtio-comment] " Cornelia Huck
2019-06-27 19:28 ` [virtio-comment] [PATCH v5 4/5] shared memory: Define PCI capability Dr. David Alan Gilbert (git)
2019-07-03 13:23 ` [virtio-comment] " Cornelia Huck
2019-07-10 17:49 ` Dr. David Alan Gilbert
2019-06-27 19:28 ` Dr. David Alan Gilbert (git) [this message]
2019-07-03 13:26 ` [virtio-comment] Re: [PATCH v5 5/5] shared memory: Define mmio registers Cornelia Huck
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