From: "Michael S. Tsirkin" <mst@redhat.com>
To: Parav Pandit <parav@nvidia.com>
Cc: virtio-dev@lists.oasis-open.org, cohuck@redhat.com,
david.edmondson@oracle.com, sburla@marvell.com,
jasowang@redhat.com, virtio-comment@lists.oasis-open.org,
shahafs@nvidia.com
Subject: [virtio-dev] Re: [PATCH v1 1/2] transport-pci: Introduce legacy registers access commands
Date: Wed, 3 May 2023 15:21:42 -0400 [thread overview]
Message-ID: <20230503151908-mutt-send-email-mst@kernel.org> (raw)
In-Reply-To: <20230503032659.530330-2-parav@nvidia.com>
On Wed, May 03, 2023 at 06:26:58AM +0300, Parav Pandit wrote:
> +\begin{lstlisting}
> +struct virtio_admin_cmd_lreg_wr_data {
> + u8 offset; /* Starting byte offset of the register(s) to write */
> + u8 size; /* Number of bytes to write into the register. */
> + u8 register[];
> +};
BTW if we don't have padding we could reuse buffer size and won't need
size here. Do we want to tweak admin command structure generally to use
u8 and not le64 for command data then? WDYT?
--
MST
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next prev parent reply other threads:[~2023-05-03 19:21 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-03 3:26 [virtio-dev] [PATCH v1 0/2] transport-pci: Introduce legacy registers access using AQ Parav Pandit
2023-05-03 3:26 ` [virtio-dev] [PATCH v1 1/2] transport-pci: Introduce legacy registers access commands Parav Pandit
2023-05-03 5:42 ` [virtio-dev] " Michael S. Tsirkin
2023-05-03 14:47 ` Parav Pandit
2023-05-03 16:48 ` Michael S. Tsirkin
2023-05-03 17:21 ` Parav Pandit
2023-05-04 6:30 ` Michael S. Tsirkin
2023-05-03 5:50 ` Michael S. Tsirkin
2023-05-03 14:49 ` Parav Pandit
2023-05-03 16:49 ` Michael S. Tsirkin
2023-05-03 17:23 ` Parav Pandit
2023-05-04 6:30 ` Michael S. Tsirkin
2023-05-03 19:21 ` Michael S. Tsirkin [this message]
2023-05-03 19:38 ` Parav Pandit
2023-05-03 20:08 ` Michael S. Tsirkin
2023-05-03 20:13 ` Parav Pandit
2023-05-05 3:26 ` Jason Wang
2023-05-05 12:48 ` [virtio-dev] " Parav Pandit
2023-05-06 2:24 ` [virtio-dev] " Jason Wang
2023-05-06 2:25 ` Jason Wang
2023-05-03 3:26 ` [virtio-dev] [PATCH v1 2/2] transport-pci: Add legacy register access conformance section Parav Pandit
2023-05-03 5:48 ` [virtio-dev] " Michael S. Tsirkin
2023-05-03 14:53 ` [virtio-dev] Re: [virtio-comment] " Parav Pandit
2023-05-03 19:18 ` Michael S. Tsirkin
2023-05-03 19:56 ` [virtio-dev] " Parav Pandit
2023-05-03 10:16 ` [virtio-dev] Re: [PATCH v1 0/2] transport-pci: Introduce legacy registers access using AQ Michael S. Tsirkin
2023-05-03 14:57 ` Parav Pandit
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