Discussion of the implementations of VIRTIO specification
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From: Cornelia Huck <cohuck@redhat.com>
To: Parav Pandit <parav@nvidia.com>,
	mst@redhat.com, virtio-dev@lists.oasis-open.org
Cc: virtio-comment@lists.oasis-open.org, shahafs@nvidia.com,
	Parav Pandit <parav@nvidia.com>
Subject: [virtio-dev] Re: [PATCH 5/6] transport-mmio: Correct spelling errors
Date: Thu, 16 Feb 2023 15:16:11 +0100	[thread overview]
Message-ID: <87fsb5ae6s.fsf@redhat.com> (raw)
In-Reply-To: <20230203201620.107744-6-parav@nvidia.com>

On Fri, Feb 03 2023, Parav Pandit <parav@nvidia.com> wrote:

> Now that we have individual files, fix reported spelling errors.
>
> While at it, remove extra white space at end of line.
>
> Signed-off-by: Parav Pandit <parav@nvidia.com>
> ---
>  transport-mmio.tex | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/transport-mmio.tex b/transport-mmio.tex
> index 7f2e0c3..7f4cc15 100644
> --- a/transport-mmio.tex
> +++ b/transport-mmio.tex
> @@ -18,7 +18,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
>  
>  MMIO virtio devices provide a set of memory mapped control
>  registers followed by a device-specific configuration space,
> -described in the table~\ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout}.
> +described in the table~\ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout}.
>  
>  All register values are organized as Little Endian.
>  
> @@ -32,7 +32,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
>  
>  \begin{longtable}{p{0.2\textwidth}p{0.7\textwidth}}
>    \caption {MMIO Device Register Layout}
> -  \label{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout} \\
> +  \label{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout} \\
>    \hline
>    \mmioreg{Name}{Function}{Offset from base}{Direction}{Description} 
>    \hline 

More trailing blanks on those two lines (and also several more in the
other register descriptions) -- maybe fix them all in one go?


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  reply	other threads:[~2023-02-16 14:16 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-03 20:16 [virtio-comment] [PATCH 0/6] Split transport specific files Parav Pandit
2023-02-03 20:16 ` [PATCH 1/6] transport-pci: Split PCI transport to its own file Parav Pandit
2023-02-03 20:16 ` [PATCH 2/6] transport-mmio: Split MMIO " Parav Pandit
2023-02-03 20:16 ` [PATCH 3/6] transport-channelio: Split Channel IO " Parav Pandit
2023-02-03 20:16 ` [PATCH 4/6] transport-pci: Correct spelling errors Parav Pandit
2023-02-03 20:16 ` [PATCH 5/6] transport-mmio: " Parav Pandit
2023-02-16 14:16   ` Cornelia Huck [this message]
2023-02-03 20:16 ` [PATCH 6/6] transport-channelio: " Parav Pandit

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