From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Michael S. Tsirkin" Subject: Re: [PATCHv3 RFC] virtio-pci: flexible configuration layout Date: Thu, 24 Nov 2011 08:24:41 +0200 Message-ID: <20111124062440.GG29994@redhat.com> References: <20111122183621.GA5235@redhat.com> <87hb1v1scp.fsf@rustcorp.com.au> <20111123084640.GE22734@redhat.com> <87ty5uxso3.fsf@rustcorp.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <87ty5uxso3.fsf@rustcorp.com.au> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: virtualization-bounces@lists.linux-foundation.org Errors-To: virtualization-bounces@lists.linux-foundation.org To: Rusty Russell Cc: Krishna Kumar , kvm@vger.kernel.org, Pawel Moll , Wang Sheng-Hui , Alexey Kardashevskiy , lkml - Kernel Mailing List , virtualization@lists.linux-foundation.org, Christian Borntraeger , Sasha Levin , Amit Shah List-Id: virtualization@lists.linuxfoundation.org On Thu, Nov 24, 2011 at 11:06:44AM +1030, Rusty Russell wrote: > > > +/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */ > > > +struct virtio_pci_common_cfg { > > > + /* About the whole device. */ > > > + __u64 device_features; /* read-only */ > > > + __u64 guest_features; /* read-write */ > > > + __u64 queue_address; /* read-write */ > > > + __u16 msix_config; /* read-write */ > > > + __u8 device_status; /* read-write */ > > > + __u8 unused; > > > + > > > + /* About a specific virtqueue. */ > > > + __u16 queue_select; /* read-write */ > > > + __u16 queue_align; /* read-write, power of 2. */ > > > + __u16 queue_size; /* read-write, power of 2. */ > > > + __u16 queue_msix_vector;/* read-write */ > > > +}; > > > > Slightly confusing as the registers are in fact little endian ... > > Good point, should mark them appropriately with __le16. That makes it > even clearer. > > Thanks, > Rusty. Do we still require atomic access to fields in common cfg? If yes it's a problem as some systems don't have 64 bit addresses. If no, implementations might get harder. -- MST