From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
guoren@kernel.org
Subject: [PATCH v1 12/14] RISC-V: KVM: selftests: Add guest_sbi_probe_extension
Date: Tue, 5 Dec 2023 19:11:32 +0100 [thread overview]
Message-ID: <20231205181119.207204-28-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231205181119.207204-16-ajones@ventanamicro.com>
Add guest_sbi_probe_extension(), allowing guest code to probe for
SBI extensions. As guest_sbi_probe_extension() needs
SBI_ERR_NOT_SUPPORTED, take the opportunity to bring in all SBI
error codes. We don't bring in all current extension IDs or base
extension function IDs though, even though we need one of each,
because we'd prefer to bring those in as necessary.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
.../selftests/kvm/include/riscv/processor.h | 21 +++++++++++++++++++
.../selftests/kvm/lib/riscv/processor.c | 19 +++++++++++++++++
2 files changed, 40 insertions(+)
diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
index e70ccda2011b..dc50ad62e150 100644
--- a/tools/testing/selftests/kvm/include/riscv/processor.h
+++ b/tools/testing/selftests/kvm/include/riscv/processor.h
@@ -108,6 +108,17 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype,
#define SATP_ASID_SHIFT 44
#define SATP_ASID_MASK _AC(0xFFFF, UL)
+/* SBI return error codes */
+#define SBI_SUCCESS 0
+#define SBI_ERR_FAILURE -1
+#define SBI_ERR_NOT_SUPPORTED -2
+#define SBI_ERR_INVALID_PARAM -3
+#define SBI_ERR_DENIED -4
+#define SBI_ERR_INVALID_ADDRESS -5
+#define SBI_ERR_ALREADY_AVAILABLE -6
+#define SBI_ERR_ALREADY_STARTED -7
+#define SBI_ERR_ALREADY_STOPPED -8
+
#define SBI_EXT_EXPERIMENTAL_START 0x08000000
#define SBI_EXT_EXPERIMENTAL_END 0x08FFFFFF
@@ -115,6 +126,14 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype,
#define KVM_RISCV_SELFTESTS_SBI_UCALL 0
#define KVM_RISCV_SELFTESTS_SBI_UNEXP 1
+enum sbi_ext_id {
+ SBI_EXT_BASE = 0x10,
+};
+
+enum sbi_ext_base_fid {
+ SBI_EXT_BASE_PROBE_EXT = 3,
+};
+
struct sbiret {
long error;
long value;
@@ -125,4 +144,6 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
+bool guest_sbi_probe_extension(int extid, long *out_val);
+
#endif /* SELFTEST_KVM_PROCESSOR_H */
diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c
index 6905a4348380..7ca736fb4194 100644
--- a/tools/testing/selftests/kvm/lib/riscv/processor.c
+++ b/tools/testing/selftests/kvm/lib/riscv/processor.c
@@ -393,3 +393,22 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
return ret;
}
+
+bool guest_sbi_probe_extension(int extid, long *out_val)
+{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
+ 0, 0, 0, 0, 0);
+
+ __GUEST_ASSERT(!ret.error || ret.error == SBI_ERR_NOT_SUPPORTED,
+ "ret.error=%ld, ret.value=%ld\n", ret.error, ret.value);
+
+ if (ret.error == SBI_ERR_NOT_SUPPORTED)
+ return false;
+
+ if (out_val)
+ *out_val = ret.value;
+
+ return true;
+}
--
2.43.0
next prev parent reply other threads:[~2023-12-05 18:11 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-05 18:11 [PATCH v1 00/14] RISC-V: Add steal-time support Andrew Jones
2023-12-05 18:11 ` [PATCH v1 01/14] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-12-05 18:11 ` [PATCH v1 02/14] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-12-05 18:11 ` [PATCH v1 03/14] RISC-V: paravirt: Implement steal-time support Andrew Jones
2023-12-07 14:06 ` Conor Dooley
2023-12-07 14:44 ` Andrew Jones
2023-12-05 18:11 ` [PATCH v1 04/14] RISC-V: paravirt: Add kconfigs Andrew Jones
2023-12-07 14:07 ` Conor Dooley
2023-12-07 14:46 ` Andrew Jones
2023-12-05 18:11 ` [PATCH v1 05/14] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-12-05 18:11 ` [PATCH v1 06/14] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-12-05 18:11 ` [PATCH v1 07/14] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-12-05 18:11 ` [PATCH v1 08/14] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-12-05 18:11 ` [PATCH v1 09/14] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-12-05 18:11 ` [PATCH v1 10/14] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-12-05 18:11 ` [PATCH v1 11/14] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Andrew Jones
2023-12-05 18:11 ` Andrew Jones [this message]
2023-12-05 18:11 ` [PATCH v1 13/14] RISC-V: KVM: selftests: Add steal_time test support Andrew Jones
2023-12-05 18:11 ` [PATCH v1 14/14] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Andrew Jones
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