From: Andrew Jones <ajones@ventanamicro.com>
To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org,
virtualization@lists.linux-foundation.org
Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu,
guoren@kernel.org, conor.dooley@microchip.com
Subject: [PATCH v3 03/13] RISC-V: paravirt: Implement steal-time support
Date: Sun, 17 Dec 2023 21:40:23 +0100 [thread overview]
Message-ID: <20231217204019.36492-18-ajones@ventanamicro.com> (raw)
In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com>
When the SBI STA extension exists we can use it to implement
paravirt steal-time support. Fill in the empty pv-time functions
with an SBI STA implementation and add the Kconfig knobs allowing
it to be enabled.
Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
---
arch/riscv/Kconfig | 19 +++++++++++
arch/riscv/kernel/paravirt.c | 63 ++++++++++++++++++++++++++++++++++--
2 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 95a2a06acc6a..b99fd8129edf 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -724,6 +724,25 @@ config COMPAT
If you want to execute 32-bit userspace applications, say Y.
+config PARAVIRT
+ bool "Enable paravirtualization code"
+ depends on RISCV_SBI
+ help
+ This changes the kernel so it can modify itself when it is run
+ under a hypervisor, potentially improving performance significantly
+ over full virtualization.
+
+config PARAVIRT_TIME_ACCOUNTING
+ bool "Paravirtual steal time accounting"
+ depends on PARAVIRT
+ help
+ Select this option to enable fine granularity task steal time
+ accounting. Time spent executing other tasks in parallel with
+ the current vCPU is discounted from the vCPU power. To account for
+ that, there can be a small performance impact.
+
+ If in doubt, say N here.
+
config RELOCATABLE
bool "Build a relocatable kernel"
depends on MMU && 64BIT && !XIP_KERNEL
diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c
index 141dbcc36fa2..cc6a85432678 100644
--- a/arch/riscv/kernel/paravirt.c
+++ b/arch/riscv/kernel/paravirt.c
@@ -6,12 +6,21 @@
#define pr_fmt(fmt) "riscv-pv: " fmt
#include <linux/cpuhotplug.h>
+#include <linux/compiler.h>
+#include <linux/errno.h>
#include <linux/init.h>
#include <linux/jump_label.h>
+#include <linux/kconfig.h>
+#include <linux/kernel.h>
+#include <linux/percpu-defs.h>
#include <linux/printk.h>
#include <linux/static_call.h>
#include <linux/types.h>
+#include <asm/barrier.h>
+#include <asm/page.h>
+#include <asm/sbi.h>
+
struct static_key paravirt_steal_enabled;
struct static_key paravirt_steal_rq_enabled;
@@ -31,24 +40,72 @@ static int __init parse_no_stealacc(char *arg)
early_param("no-steal-acc", parse_no_stealacc);
+DEFINE_PER_CPU(struct sbi_sta_struct, steal_time) __aligned(64);
+
static bool __init has_pv_steal_clock(void)
{
+ if (sbi_spec_version >= sbi_mk_version(2, 0) &&
+ sbi_probe_extension(SBI_EXT_STA) > 0) {
+ pr_info("SBI STA extension detected\n");
+ return true;
+ }
+
return false;
}
-static int pv_time_cpu_online(unsigned int cpu)
+static int sbi_sta_steal_time_set_shmem(unsigned long lo, unsigned long hi,
+ unsigned long flags)
{
+ struct sbiret ret;
+
+ ret = sbi_ecall(SBI_EXT_STA, SBI_EXT_STA_STEAL_TIME_SET_SHMEM,
+ lo, hi, flags, 0, 0, 0);
+ if (ret.error) {
+ if (lo == SBI_STA_SHMEM_DISABLE && hi == SBI_STA_SHMEM_DISABLE)
+ pr_warn("Failed to disable steal-time shmem");
+ else
+ pr_warn("Failed to set steal-time shmem");
+ return sbi_err_map_linux_errno(ret.error);
+ }
+
return 0;
}
+static int pv_time_cpu_online(unsigned int cpu)
+{
+ struct sbi_sta_struct *st = this_cpu_ptr(&steal_time);
+ phys_addr_t pa = __pa(st);
+ unsigned long lo = (unsigned long)pa;
+ unsigned long hi = IS_ENABLED(CONFIG_32BIT) ? upper_32_bits((u64)pa) : 0;
+
+ return sbi_sta_steal_time_set_shmem(lo, hi, 0);
+}
+
static int pv_time_cpu_down_prepare(unsigned int cpu)
{
- return 0;
+ return sbi_sta_steal_time_set_shmem(SBI_STA_SHMEM_DISABLE,
+ SBI_STA_SHMEM_DISABLE, 0);
}
static u64 pv_time_steal_clock(int cpu)
{
- return 0;
+ struct sbi_sta_struct *st = per_cpu_ptr(&steal_time, cpu);
+ u32 sequence;
+ u64 steal;
+
+ /*
+ * Check the sequence field before and after reading the steal
+ * field. Repeat the read if it is different or odd.
+ */
+ do {
+ sequence = READ_ONCE(st->sequence);
+ virt_rmb();
+ steal = READ_ONCE(st->steal);
+ virt_rmb();
+ } while ((le32_to_cpu(sequence) & 1) ||
+ sequence != READ_ONCE(st->sequence));
+
+ return le64_to_cpu(steal);
}
int __init pv_time_init(void)
--
2.43.0
next prev parent reply other threads:[~2023-12-17 20:40 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-17 20:40 [PATCH v3 00/13] RISC-V: Add steal-time support Andrew Jones
2023-12-17 20:40 ` [PATCH v3 01/13] RISC-V: paravirt: Add skeleton for pv-time support Andrew Jones
2023-12-19 0:48 ` Atish Patra
2023-12-19 14:29 ` Andrew Jones
2023-12-17 20:40 ` [PATCH v3 02/13] RISC-V: Add SBI STA extension definitions Andrew Jones
2023-12-19 0:49 ` Atish Patra
2023-12-17 20:40 ` Andrew Jones [this message]
2023-12-19 1:41 ` [PATCH v3 03/13] RISC-V: paravirt: Implement steal-time support Atish Patra
2023-12-20 6:41 ` Anup Patel
2023-12-17 20:40 ` [PATCH v3 04/13] RISC-V: KVM: Add SBI STA extension skeleton Andrew Jones
2023-12-19 1:42 ` Atish Patra
2023-12-17 20:40 ` [PATCH v3 05/13] RISC-V: KVM: Add steal-update vcpu request Andrew Jones
2023-12-19 1:46 ` Atish Patra
2023-12-17 20:40 ` [PATCH v3 06/13] RISC-V: KVM: Add SBI STA info to vcpu_arch Andrew Jones
2023-12-19 1:49 ` Atish Patra
2023-12-17 20:40 ` [PATCH v3 07/13] RISC-V: KVM: Add support for SBI extension registers Andrew Jones
2023-12-19 19:58 ` Atish Patra
2023-12-20 6:16 ` Andrew Jones
2023-12-20 6:19 ` Anup Patel
2023-12-20 6:32 ` Andrew Jones
2023-12-17 20:40 ` [PATCH v3 08/13] RISC-V: KVM: Add support for SBI STA registers Andrew Jones
2023-12-17 20:40 ` [PATCH v3 09/13] RISC-V: KVM: Implement SBI STA extension Andrew Jones
2023-12-19 21:52 ` Atish Patra
2023-12-17 20:40 ` [PATCH v3 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Andrew Jones
2023-12-17 20:40 ` [PATCH v3 11/13] RISC-V: KVM: selftests: Add guest_sbi_probe_extension Andrew Jones
2023-12-19 21:57 ` Atish Patra
2023-12-20 6:28 ` Andrew Jones
2023-12-17 20:40 ` [PATCH v3 12/13] RISC-V: KVM: selftests: Add steal_time test support Andrew Jones
2023-12-19 23:39 ` Atish Patra
2023-12-17 20:40 ` [PATCH v3 13/13] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Andrew Jones
2023-12-19 23:40 ` Atish Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231217204019.36492-18-ajones@ventanamicro.com \
--to=ajones@ventanamicro.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=conor.dooley@microchip.com \
--cc=guoren@kernel.org \
--cc=jgross@suse.com \
--cc=kvm-riscv@lists.infradead.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=pbonzini@redhat.com \
--cc=srivatsa@csail.mit.edu \
--cc=virtualization@lists.linux-foundation.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).