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[2001:1ae9:1c2:4c00:20f:c6b4:1e57:7965]) by smtp.gmail.com with ESMTPSA id j10-20020a05600c488a00b004161ea7ed6dsm6093903wmp.38.2024.04.05.05.17.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Apr 2024 05:17:50 -0700 (PDT) Date: Fri, 5 Apr 2024 14:17:49 +0200 From: Andrew Jones To: Atish Patra Cc: linux-kernel@vger.kernel.org, Ajay Kaher , Alexandre Ghiti , Alexey Makhalov , Anup Patel , Conor Dooley , Juergen Gross , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Palmer Dabbelt , Paolo Bonzini , Paul Walmsley , Shuah Khan , virtualization@lists.linux.dev, VMware PV-Drivers Reviewers , Will Deacon , x86@kernel.org Subject: Re: [PATCH v5 17/22] KVM: riscv: selftests: Add helper functions for extension checks Message-ID: <20240405-dae6363b92b742554e85cf4c@orel> References: <20240403080452.1007601-1-atishp@rivosinc.com> <20240403080452.1007601-18-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: virtualization@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240403080452.1007601-18-atishp@rivosinc.com> On Wed, Apr 03, 2024 at 01:04:46AM -0700, Atish Patra wrote: > __vcpu_has_ext can check both SBI and ISA extensions when the first > argument is properly converted to SBI/ISA extension IDs. Introduce > two helper functions to make life easier for developers so they > don't have to worry about the conversions. > > Replace the current usages as well with new helpers. > > Signed-off-by: Atish Patra > --- > tools/testing/selftests/kvm/include/riscv/processor.h | 10 ++++++++++ > tools/testing/selftests/kvm/riscv/arch_timer.c | 2 +- > 2 files changed, 11 insertions(+), 1 deletion(-) > > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h > index 3b9cb39327ff..5f389166338c 100644 > --- a/tools/testing/selftests/kvm/include/riscv/processor.h > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h > @@ -50,6 +50,16 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype, > > bool __vcpu_has_ext(struct kvm_vcpu *vcpu, uint64_t ext); > > +static inline bool __vcpu_has_isa_ext(struct kvm_vcpu *vcpu, uint64_t isa_ext) > +{ > + return __vcpu_has_ext(vcpu, RISCV_ISA_EXT_REG(isa_ext)); > +} > + > +static inline bool __vcpu_has_sbi_ext(struct kvm_vcpu *vcpu, uint64_t sbi_ext) > +{ > + return __vcpu_has_ext(vcpu, RISCV_SBI_EXT_REG(sbi_ext)); > +} > + > struct ex_regs { > unsigned long ra; > unsigned long sp; > diff --git a/tools/testing/selftests/kvm/riscv/arch_timer.c b/tools/testing/selftests/kvm/riscv/arch_timer.c > index e22848f747c0..6a3e97ead824 100644 > --- a/tools/testing/selftests/kvm/riscv/arch_timer.c > +++ b/tools/testing/selftests/kvm/riscv/arch_timer.c > @@ -85,7 +85,7 @@ struct kvm_vm *test_vm_create(void) > int nr_vcpus = test_args.nr_vcpus; > > vm = vm_create_with_vcpus(nr_vcpus, guest_code, vcpus); > - __TEST_REQUIRE(__vcpu_has_ext(vcpus[0], RISCV_ISA_EXT_REG(KVM_RISCV_ISA_EXT_SSTC)), > + __TEST_REQUIRE(__vcpu_has_isa_ext(vcpus[0], KVM_RISCV_ISA_EXT_SSTC), > "SSTC not available, skipping test\n"); > > vm_init_vector_tables(vm); > -- > 2.34.1 > Reviewed-by: Andrew Jones