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Mon, 29 Jul 2024 06:03:03 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46T6320s016865 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 29 Jul 2024 06:03:02 GMT Received: from quicinc.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Sun, 28 Jul 2024 23:02:57 -0700 Date: Mon, 29 Jul 2024 11:32:53 +0530 From: Srivatsa Vaddagiri To: Jason Wang CC: , , , , , , , , , , , eperezma , Stefano Garzarella , mst , Cindy Lu Subject: Re: [RFC] vduse config write support Message-ID: <20240729060122.GA1542333@quicinc.com> Reply-To: Srivatsa Vaddagiri References: <20240724033816.GD492231@quicinc.com> <20240726070324.GA723942@quicinc.com> Precedence: bulk X-Mailing-List: virtualization@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline In-Reply-To: X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: f8GEwEpxRZlF7KXh8z5HYTx2UFj1M7-z X-Proofpoint-ORIG-GUID: f8GEwEpxRZlF7KXh8z5HYTx2UFj1M7-z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-29_04,2024-07-26_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=621 impostorscore=0 spamscore=0 adultscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 malwarescore=0 mlxscore=0 clxscore=1015 phishscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407290040 * Jason Wang [2024-07-29 10:16:48]: > > Without this optimization, guest VCPU would have stalled until VMM in host can > > emulate it, which can be long, especially a concern when the read is issued in > > hot path (interrupt handler, w/o MSI_X). > > I think I agree with Michael, let's try to use MSI-X here where > there's a lot of existing optimizations in various layers. Yes sure. Even if we implement MSI-X, there is a security angle to why we want hypervisor-hosted PCI bus (have provided details in an earlier reply https://lore.kernel.org/virtio-dev/20240726070609.GB723942@quicinc.com/T/#m84455763d6b4d0d3b8df814b3d64e6e48ec12ae3 > > > > We will however likely need vduse to support configuration writes (guest VM > > > > updating configuration space, for ex: writing to 'events_clear' field in case of > > > > virtio-gpu). Would vduse maintainers be willing to accept config_write support > > > > for select devices/features (as long as the writes don't violate any safety > > > > concerns we may have)? > > > > > > I think so, looking at virtio_gpu_config_changed_work_func(), the > > > events_clear seems to be fine to have a posted semantic. > > > > > > Maybe you can post an RFC to support config writing and let's start from there? Does VDUSE support runtime configuration changes (ex: block device capacity changes)? I am curious how the atomicity of that update is handled. For ex: guest reading config space while concurrent updates are underway (SET_CONFIG). I think the generation count should help there - but it was not clear to me how VDUSE is handling generation_count reads during such concurrent udpates. - vatsa