* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
[not found] ` <853ce127-25f0-d0fe-1d8f-0b0dd4f3ce71@intel.com>
@ 2022-03-07 9:50 ` Peter Zijlstra
2022-03-07 10:06 ` Juergen Gross via Virtualization
[not found] ` <30383f92-59cb-2875-1e1b-ff1a0eacd235@intel.com>
0 siblings, 2 replies; 8+ messages in thread
From: Peter Zijlstra @ 2022-03-07 9:50 UTC (permalink / raw)
To: Adrian Hunter
Cc: kvm, Alexander Shishkin, Dave Hansen, virtualization,
H Peter Anvin, Jiri Olsa, sthemmin, x86, pv-drivers, Ingo Molnar,
Suzuki K Poulose, Arnaldo Carvalho de Melo, Andrew.Cooper3,
Borislav Petkov, Thomas Gleixner, jgross, Mathieu Poirier, seanjc,
linux-kernel, Leo Yan, pbonzini
On Fri, Mar 04, 2022 at 08:27:45PM +0200, Adrian Hunter wrote:
> On 04/03/2022 15:41, Peter Zijlstra wrote:
> > On Mon, Feb 14, 2022 at 01:09:06PM +0200, Adrian Hunter wrote:
> >> Currently, when Intel PT is used within a VM guest, it is not possible to
> >> make use of TSC because perf clock is subject to paravirtualization.
> >
> > Yeah, so how much of that still makes sense, or ever did? AFAIK the
> > whole pv_clock thing is utter crazy. Should we not fix that instead?
>
> Presumably pv_clock must work with different host operating systems.
> Similarly, KVM must work with different guest operating systems.
> Perhaps I'm wrong, but I imagine re-engineering time virtualization
> might be a pretty big deal, far exceeding the scope of these patches.
I think not; on both counts. That is, I don't think it's going to be
hard, and even it if were, it would still be the right thing to do.
We're not going to add interface just to work around a known broken
piece of crap just because we don't want to fix it.
So I'm thinking we should do the below and simply ignore any paravirt
sched clock offered when there's ART on.
---
diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
index 4420499f7bb4..a1f179ed39bf 100644
--- a/arch/x86/kernel/paravirt.c
+++ b/arch/x86/kernel/paravirt.c
@@ -145,6 +145,15 @@ DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
void paravirt_set_sched_clock(u64 (*func)(void))
{
+ /*
+ * Anything with ART on promises to have sane TSC, otherwise the whole
+ * ART thing is useless. In order to make ART useful for guests, we
+ * should continue to use the TSC. As such, ignore any paravirt
+ * muckery.
+ */
+ if (cpu_feature_enabled(X86_FEATURE_ART))
+ return;
+
static_call_update(pv_sched_clock, func);
}
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
2022-03-07 9:50 ` [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock Peter Zijlstra
@ 2022-03-07 10:06 ` Juergen Gross via Virtualization
2022-03-07 10:38 ` Peter Zijlstra
[not found] ` <30383f92-59cb-2875-1e1b-ff1a0eacd235@intel.com>
1 sibling, 1 reply; 8+ messages in thread
From: Juergen Gross via Virtualization @ 2022-03-07 10:06 UTC (permalink / raw)
To: Peter Zijlstra, Adrian Hunter
Cc: kvm, Alexander Shishkin, Dave Hansen, virtualization,
H Peter Anvin, Jiri Olsa, sthemmin, x86, pv-drivers, Ingo Molnar,
Suzuki K Poulose, Leo Yan, Arnaldo Carvalho de Melo,
Borislav Petkov, Thomas Gleixner, Mathieu Poirier, seanjc,
linux-kernel, Andrew.Cooper3, pbonzini
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On 07.03.22 10:50, Peter Zijlstra wrote:
> On Fri, Mar 04, 2022 at 08:27:45PM +0200, Adrian Hunter wrote:
>> On 04/03/2022 15:41, Peter Zijlstra wrote:
>>> On Mon, Feb 14, 2022 at 01:09:06PM +0200, Adrian Hunter wrote:
>>>> Currently, when Intel PT is used within a VM guest, it is not possible to
>>>> make use of TSC because perf clock is subject to paravirtualization.
>>>
>>> Yeah, so how much of that still makes sense, or ever did? AFAIK the
>>> whole pv_clock thing is utter crazy. Should we not fix that instead?
>>
>> Presumably pv_clock must work with different host operating systems.
>> Similarly, KVM must work with different guest operating systems.
>> Perhaps I'm wrong, but I imagine re-engineering time virtualization
>> might be a pretty big deal, far exceeding the scope of these patches.
>
> I think not; on both counts. That is, I don't think it's going to be
> hard, and even it if were, it would still be the right thing to do.
>
> We're not going to add interface just to work around a known broken
> piece of crap just because we don't want to fix it.
>
> So I'm thinking we should do the below and simply ignore any paravirt
> sched clock offered when there's ART on.
>
> ---
> diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
> index 4420499f7bb4..a1f179ed39bf 100644
> --- a/arch/x86/kernel/paravirt.c
> +++ b/arch/x86/kernel/paravirt.c
> @@ -145,6 +145,15 @@ DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
>
> void paravirt_set_sched_clock(u64 (*func)(void))
> {
> + /*
> + * Anything with ART on promises to have sane TSC, otherwise the whole
> + * ART thing is useless. In order to make ART useful for guests, we
> + * should continue to use the TSC. As such, ignore any paravirt
> + * muckery.
> + */
> + if (cpu_feature_enabled(X86_FEATURE_ART))
> + return;
> +
> static_call_update(pv_sched_clock, func);
> }
>
>
NAK, this will break live migration of a guest coming from a host
without this feature.
Juergen
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
2022-03-07 10:06 ` Juergen Gross via Virtualization
@ 2022-03-07 10:38 ` Peter Zijlstra
2022-03-07 10:58 ` Juergen Gross via Virtualization
0 siblings, 1 reply; 8+ messages in thread
From: Peter Zijlstra @ 2022-03-07 10:38 UTC (permalink / raw)
To: Juergen Gross
Cc: kvm, Alexander Shishkin, Dave Hansen, virtualization,
H Peter Anvin, Jiri Olsa, sthemmin, x86, pv-drivers, Ingo Molnar,
Suzuki K Poulose, Arnaldo Carvalho de Melo, Andrew.Cooper3,
Borislav Petkov, Thomas Gleixner, Mathieu Poirier, seanjc,
Adrian Hunter, linux-kernel, Leo Yan, pbonzini
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On Mon, Mar 07, 2022 at 11:06:46AM +0100, Juergen Gross wrote:
> > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
> > index 4420499f7bb4..a1f179ed39bf 100644
> > --- a/arch/x86/kernel/paravirt.c
> > +++ b/arch/x86/kernel/paravirt.c
> > @@ -145,6 +145,15 @@ DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
> > void paravirt_set_sched_clock(u64 (*func)(void))
> > {
> > + /*
> > + * Anything with ART on promises to have sane TSC, otherwise the whole
> > + * ART thing is useless. In order to make ART useful for guests, we
> > + * should continue to use the TSC. As such, ignore any paravirt
> > + * muckery.
> > + */
> > + if (cpu_feature_enabled(X86_FEATURE_ART))
> > + return;
> > +
> > static_call_update(pv_sched_clock, func);
> > }
> >
>
> NAK, this will break live migration of a guest coming from a host
> without this feature.
I thought the whole live-migration nonsense made sure to equalize crud
like that. That is, then don't expose ART to the guest.
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
2022-03-07 10:38 ` Peter Zijlstra
@ 2022-03-07 10:58 ` Juergen Gross via Virtualization
0 siblings, 0 replies; 8+ messages in thread
From: Juergen Gross via Virtualization @ 2022-03-07 10:58 UTC (permalink / raw)
To: Peter Zijlstra
Cc: kvm, Alexander Shishkin, Dave Hansen, virtualization,
H Peter Anvin, Jiri Olsa, sthemmin, x86, pv-drivers, Ingo Molnar,
Suzuki K Poulose, Arnaldo Carvalho de Melo, Andrew.Cooper3,
Borislav Petkov, Thomas Gleixner, Mathieu Poirier, seanjc,
Adrian Hunter, linux-kernel, Leo Yan, pbonzini
[-- Attachment #1.1.1.1: Type: text/plain, Size: 1199 bytes --]
On 07.03.22 11:38, Peter Zijlstra wrote:
> On Mon, Mar 07, 2022 at 11:06:46AM +0100, Juergen Gross wrote:
>
>>> diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
>>> index 4420499f7bb4..a1f179ed39bf 100644
>>> --- a/arch/x86/kernel/paravirt.c
>>> +++ b/arch/x86/kernel/paravirt.c
>>> @@ -145,6 +145,15 @@ DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
>>> void paravirt_set_sched_clock(u64 (*func)(void))
>>> {
>>> + /*
>>> + * Anything with ART on promises to have sane TSC, otherwise the whole
>>> + * ART thing is useless. In order to make ART useful for guests, we
>>> + * should continue to use the TSC. As such, ignore any paravirt
>>> + * muckery.
>>> + */
>>> + if (cpu_feature_enabled(X86_FEATURE_ART))
>>> + return;
>>> +
>>> static_call_update(pv_sched_clock, func);
>>> }
>>>
>>
>> NAK, this will break live migration of a guest coming from a host
>> without this feature.
>
> I thought the whole live-migration nonsense made sure to equalize crud
> like that. That is, then don't expose ART to the guest.
Oh, right. I managed to confuse host-side and guest-side usage.
Sorry for the noise.
Juergen
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
[not found] ` <30383f92-59cb-2875-1e1b-ff1a0eacd235@intel.com>
@ 2022-03-07 14:42 ` Peter Zijlstra
[not found] ` <013b5425-2a60-e4d4-b846-444a576f2b28@intel.com>
0 siblings, 1 reply; 8+ messages in thread
From: Peter Zijlstra @ 2022-03-07 14:42 UTC (permalink / raw)
To: Adrian Hunter
Cc: kvm, Alexander Shishkin, Dave Hansen, virtualization,
H Peter Anvin, Jiri Olsa, christopher.s.hall, sthemmin, x86,
pv-drivers, Ingo Molnar, Suzuki K Poulose,
Arnaldo Carvalho de Melo, Andrew.Cooper3, Borislav Petkov,
Thomas Gleixner, jgross, Mathieu Poirier, seanjc, linux-kernel,
Leo Yan, pbonzini
On Mon, Mar 07, 2022 at 02:36:03PM +0200, Adrian Hunter wrote:
> > diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c
> > index 4420499f7bb4..a1f179ed39bf 100644
> > --- a/arch/x86/kernel/paravirt.c
> > +++ b/arch/x86/kernel/paravirt.c
> > @@ -145,6 +145,15 @@ DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
> >
> > void paravirt_set_sched_clock(u64 (*func)(void))
> > {
> > + /*
> > + * Anything with ART on promises to have sane TSC, otherwise the whole
> > + * ART thing is useless. In order to make ART useful for guests, we
> > + * should continue to use the TSC. As such, ignore any paravirt
> > + * muckery.
> > + */
> > + if (cpu_feature_enabled(X86_FEATURE_ART))
>
> Does not seem to work because the feature X86_FEATURE_ART does not seem to get set.
> Possibly because detect_art() excludes anything running on a hypervisor.
Simple enough to delete that clause I suppose. Christopher, what is
needed to make that go away? I suppose the guest needs to be aware of
the active TSC scaling parameters to make it work ?
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
[not found] ` <50fd2671-6070-0eba-ea68-9df9b79ccac3@intel.com>
@ 2022-04-25 9:32 ` Thomas Gleixner
[not found] ` <ff1e190a-95e6-e2a6-dc01-a46f7ffd2162@intel.com>
0 siblings, 1 reply; 8+ messages in thread
From: Thomas Gleixner @ 2022-04-25 9:32 UTC (permalink / raw)
To: Adrian Hunter, Peter Zijlstra
Cc: kvm@vger.kernel.org, Alexander Shishkin, Dave Hansen,
virtualization@lists.linux-foundation.org, H Peter Anvin,
Jiri Olsa, Hall, Christopher S, sthemmin@microsoft.com,
x86@kernel.org, pv-drivers@vmware.com, Ingo Molnar,
Suzuki K Poulose, Leo Yan, Arnaldo Carvalho de Melo,
Borislav Petkov, jgross@suse.com, Mathieu Poirier,
seanjc@google.com, linux-kernel@vger.kernel.org,
Andrew.Cooper3@citrix.com, pbonzini@redhat.com
On Mon, Apr 25 2022 at 08:30, Adrian Hunter wrote:
> On 14/03/22 13:50, Adrian Hunter wrote:
>>> TSC offsetting may also be a problem. The VMCS TSC offset must be discoverable by the
>>> guest. This can be done via TSC_ADJUST MSR. The offset in the VMCS and the guest
>>> TSC_ADJUST MSR must always be equivalent, i.e. a write to TSC_ADJUST in the guest
>>> must be reflected in the VMCS and any changes to the offset in the VMCS must be
>>> reflected in the TSC_ADJUST MSR. Otherwise a para-virtualized method must
>>> be invented to communicate an arbitrary VMCS TSC offset to the guest.
>>>
>>
>> In my view it is reasonable for perf to support TSC as a perf clock in any case
>> because:
>> a) it allows users to work entirely with TSC if they wish
>> b) other kernel performance / debug facilities like ftrace already support TSC
>> c) the patches to add TSC support are relatively small and straight-forward
>>
>> May we have support for TSC as a perf event clock?
>
> Any update on this?
If TSC is reliable on the host, then there is absolutely no reason not
to use it in the guest all over the place. And that is independent of
exposing ART to the guest.
So why do we need extra solutions for PT and perf, ftrace and whatever?
Can we just fix the underlying problem and make the hypervisor tell the
guest that TSC is stable, reliable and good to use?
Then everything else just falls into place and using TSC is a
substantial performance gain in general. Just look at the VDSO
implementation of __arch_get_hw_counter() -> vread_pvclock():
Instead of just reading the TSC, this needs to take a nested seqcount,
read TSC and do yet another mult/shift, which makes clock_gettime() ~20%
slower than necessary.
It's hillarious, that we still cling to this pvclock abomination, while
we happily expose TSC deadline timer to the guest. TSC virt scaling was
implemented in hardware for a reason.
Thanks,
tglx
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
[not found] ` <ff1e190a-95e6-e2a6-dc01-a46f7ffd2162@intel.com>
@ 2022-04-25 17:05 ` Thomas Gleixner
[not found] ` <c8033229-97a0-3e4c-66d5-74c0d1d4e15c@intel.com>
0 siblings, 1 reply; 8+ messages in thread
From: Thomas Gleixner @ 2022-04-25 17:05 UTC (permalink / raw)
To: Adrian Hunter, Peter Zijlstra
Cc: kvm@vger.kernel.org, Alexander Shishkin, Dave Hansen,
virtualization@lists.linux-foundation.org, H Peter Anvin,
Jiri Olsa, Hall, Christopher S, sthemmin@microsoft.com,
x86@kernel.org, pv-drivers@vmware.com, Ingo Molnar,
Suzuki K Poulose, Leo Yan, Arnaldo Carvalho de Melo,
Borislav Petkov, jgross@suse.com, Mathieu Poirier,
seanjc@google.com, linux-kernel@vger.kernel.org,
Andrew.Cooper3@citrix.com, pbonzini@redhat.com
On Mon, Apr 25 2022 at 16:15, Adrian Hunter wrote:
> On 25/04/22 12:32, Thomas Gleixner wrote:
>> It's hillarious, that we still cling to this pvclock abomination, while
>> we happily expose TSC deadline timer to the guest. TSC virt scaling was
>> implemented in hardware for a reason.
>
> So you are talking about changing VMX TCS Offset on every VM-Entry to try to hide
> the time jumps when the VM is scheduled out? Or neglect that and just let the time
> jumps happen?
>
> If changing VMX TCS Offset, how can TSC be kept consistent between each VCPU i.e.
> wouldn't that mean each VCPU has to have the same VMX TSC Offset?
Obviously so. That's the only thing which makes sense, no?
Thanks,
tglx
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^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock
[not found] ` <c8033229-97a0-3e4c-66d5-74c0d1d4e15c@intel.com>
@ 2022-04-27 23:10 ` Thomas Gleixner
0 siblings, 0 replies; 8+ messages in thread
From: Thomas Gleixner @ 2022-04-27 23:10 UTC (permalink / raw)
To: Adrian Hunter, Peter Zijlstra
Cc: kvm@vger.kernel.org, Alexander Shishkin, Dave Hansen,
virtualization@lists.linux-foundation.org, H Peter Anvin,
Jiri Olsa, Hall, Christopher S, sthemmin@microsoft.com,
x86@kernel.org, pv-drivers@vmware.com, Ingo Molnar,
Suzuki K Poulose, Leo Yan, Arnaldo Carvalho de Melo,
Borislav Petkov, jgross@suse.com, Mathieu Poirier,
seanjc@google.com, linux-kernel@vger.kernel.org,
Andrew.Cooper3@citrix.com, pbonzini@redhat.com
On Tue, Apr 26 2022 at 09:51, Adrian Hunter wrote:
> On 25/04/22 20:05, Thomas Gleixner wrote:
>> On Mon, Apr 25 2022 at 16:15, Adrian Hunter wrote:
>>> On 25/04/22 12:32, Thomas Gleixner wrote:
>>>> It's hillarious, that we still cling to this pvclock abomination, while
>>>> we happily expose TSC deadline timer to the guest. TSC virt scaling was
>>>> implemented in hardware for a reason.
>>>
>>> So you are talking about changing VMX TCS Offset on every VM-Entry to try to hide
>>> the time jumps when the VM is scheduled out? Or neglect that and just let the time
>>> jumps happen?
>>>
>>> If changing VMX TCS Offset, how can TSC be kept consistent between each VCPU i.e.
>>> wouldn't that mean each VCPU has to have the same VMX TSC Offset?
>>
>> Obviously so. That's the only thing which makes sense, no?
>
> [ Sending this again, because I notice I messed up the email "From" ]
>
> But wouldn't that mean changing all the VCPUs VMX TSC Offset at the same time,
> which means when none are currently executing? How could that be done?
Why would you change TSC offset after the point where a VM is started
and why would it be different per vCPU?
Time is global and time moves on when a vCPU is scheduled out. Anything
else is bonkers, really. If the hypervisor tries to screw with that then
how does the guest do timekeeping in a consistent way?
CLOCK_REALTIME = CLOCK_MONOTONIC + offset
That offset changes when something sets the clock, i.e. clock_settime(),
settimeofday() or adjtimex() in case that NTP cannot compensate or for
the beloved leap seconds adjustment. At any other time the offset is
constant.
CLOCK_MONOTONIC is derived from the underlying clocksource which is
expected to increment with constant frequency and that has to be
consistent accross _all_ vCPUs of a particular VM.
So how would a hypervisor 'hide' scheduled out time w/o screwing up
timekeeping completely?
The guest TSC which is based on the host TSC is:
guestTSC = offset + hostTSC * factor;
If you make offset different between guest vCPUs then timekeeping in the
guest is screwed.
The whole point of that paravirt clock was to handle migration between
hosts which did not have the VMCS TSC scaling/offset mechanism. The CPUs
which did not have that went EOL at least 10 years ago.
So what are you concerned about?
Thanks,
tglx
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2022-03-07 9:50 ` [PATCH V2 03/11] perf/x86: Add support for TSC in nanoseconds as a perf event clock Peter Zijlstra
2022-03-07 10:06 ` Juergen Gross via Virtualization
2022-03-07 10:38 ` Peter Zijlstra
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[not found] ` <013b5425-2a60-e4d4-b846-444a576f2b28@intel.com>
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2022-04-25 9:32 ` Thomas Gleixner
[not found] ` <ff1e190a-95e6-e2a6-dc01-a46f7ffd2162@intel.com>
2022-04-25 17:05 ` Thomas Gleixner
[not found] ` <c8033229-97a0-3e4c-66d5-74c0d1d4e15c@intel.com>
2022-04-27 23:10 ` Thomas Gleixner
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