From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mike Stunes Subject: Re: [PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance Date: Wed, 6 May 2020 18:08:50 +0000 Message-ID: References: <20200428151725.31091-1-joro@8bytes.org> <20200428151725.31091-65-joro@8bytes.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <20200428151725.31091-65-joro@8bytes.org> Content-Language: en-US Content-ID: <29358357CB8991418C23B508C7813EE3@namprd05.prod.outlook.com> Sender: linux-kernel-owner@vger.kernel.org To: Joerg Roedel Cc: "x86@kernel.org" , "hpa@zytor.com" , Andy Lutomirski , Dave Hansen , Peter Zijlstra , Thomas Hellstrom , Jiri Slaby , Dan Williams , Tom Lendacky , Juergen Gross , Kees Cook , David Rientjes , Cfir Cohen , Erdem Aktas , Masami Hiramatsu , Joerg Roedel , "linux-kernel@vger.kernel.org" , "kvm@vger.kernel.org" , "virtualization@lists.linux-foundation.org" List-Id: virtualization@lists.linuxfoundation.org > On Apr 28, 2020, at 8:17 AM, Joerg Roedel wrote: >=20 > From: Mike Stunes >=20 > To avoid a future VMEXIT for a subsequent CPUID function, cache the > results returned by CPUID into an xarray. >=20 > [tl: coding standard changes, register zero extension] >=20 > Signed-off-by: Mike Stunes > Signed-off-by: Tom Lendacky > [ jroedel@suse.de: - Wrapped cache handling into vc_handle_cpuid_cached() > - Used lower_32_bits() where applicable > - Moved cache_index out of struct es_em_ctxt ] > Co-developed-by: Joerg Roedel > Signed-off-by: Joerg Roedel > --- > arch/x86/kernel/sev-es-shared.c | 12 ++-- > arch/x86/kernel/sev-es.c | 119 +++++++++++++++++++++++++++++++- > 2 files changed, 124 insertions(+), 7 deletions(-) >=20 > diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c > index 03095bc7b563..0303834d4811 100644 > --- a/arch/x86/kernel/sev-es.c > +++ b/arch/x86/kernel/sev-es.c > @@ -744,6 +758,91 @@ static enum es_result vc_handle_mmio(struct ghcb *gh= cb, > return ret; > } >=20 > +static unsigned long sev_es_get_cpuid_cache_index(struct es_em_ctxt *ctx= t) > +{ > + unsigned long hi, lo; > + > + /* Don't attempt to cache until the xarray is initialized */ > + if (!sev_es_cpuid_cache_initialized) > + return ULONG_MAX; > + > + lo =3D lower_32_bits(ctxt->regs->ax); > + > + /* > + * CPUID 0x0000000d requires both RCX and XCR0, so it can't be > + * cached. > + */ > + if (lo =3D=3D 0x0000000d) > + return ULONG_MAX; > + > + /* > + * Some callers of CPUID don't always set RCX to zero for CPUID > + * functions that don't require RCX, which can result in excessive > + * cached values, so RCX needs to be manually zeroed for use as part > + * of the cache index. Future CPUID values may need RCX, but since > + * they can't be known, they must not be cached. > + */ > + if (lo > 0x80000020) > + return ULONG_MAX; If the cache is shared across CPUs, do we also need to exclude function 0x1= because it contains the LAPIC ID? (Or is the cache per-CPU?)=