From: Marek Szyprowski <m.szyprowski@samsung.com>
To: Jason Gunthorpe <jgg@ziepe.ca>, Leon Romanovsky <leon@kernel.org>
Cc: "Robin Murphy" <robin.murphy@arm.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Petr Tesarik" <ptesarik@suse.com>,
"Jonathan Corbet" <corbet@lwn.net>,
"Shuah Khan" <skhan@linuxfoundation.org>,
"Jason Wang" <jasowang@redhat.com>,
"Xuan Zhuo" <xuanzhuo@linux.alibaba.com>,
"Eugenio Pérez" <eperezma@redhat.com>,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, virtualization@lists.linux.dev,
linux-rdma@vger.kernel.org
Subject: Re: [PATCH 2/3] dma-mapping: Clarify valid conditions for CPU cache line overlap
Date: Tue, 10 Mar 2026 10:45:38 +0100 [thread overview]
Message-ID: <aaebc5b6-2805-46d3-a68e-549c26a3ef03@samsung.com> (raw)
In-Reply-To: <20260309151356.GN1687929@ziepe.ca>
On 09.03.2026 16:13, Jason Gunthorpe wrote:
> On Mon, Mar 09, 2026 at 05:05:02PM +0200, Leon Romanovsky wrote:
>> Regarding failure on unsupported systems, I have tried more than once to
>> make the RDMA fail when the device is known to take the SWIOTLB path
>> in RDMA and cannot operate correctly, but each attempt was met with a
>> cold reception:
>> https://lore.kernel.org/all/d18c454636bf3cfdba9b66b7cc794d713eadc4a5.1719909395.git.leon@kernel.org/
> I think alot of that is the APIs used there. It is hard to determine
> if SWIOTLB is possible or coherent is possible, I've also hit these
> things in VFIO and gave up.
>
> However, DMA_ATTR_REQUIRE_COHERENCE can be done properly and not leak
> alot of dangerous APIs to drivers (beyond itself).
>
> It is also more important now with CC systems, I think.
Jason is right. Indeed the rdma/uverbs case needs some extension to
ensure that the coherent mapping is used, what is not possible now. This
however doesn't mean that the DMA_ATTR_CPU_CACHE_OVERLAP is not needed
for that use case too. I'm open to accept both. The only question I have
is which name should we use? We already have DMA_ATTR_CPU_CACHE_CLEAN,
while DMA_ATTR_CPU_CACHE_OVERLAP and
DMA_ATTR_DEBUGGING_IGNORE_CACHELINES were proposed here. The last seems
to be most descriptive.
Best regards
--
Marek Szyprowski, PhD
Samsung R&D Institute Poland
next prev parent reply other threads:[~2026-03-10 9:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-07 16:49 [PATCH 0/3] RDMA: Enable runs with DMA debug enabled Leon Romanovsky
2026-03-07 16:49 ` [PATCH 1/3] dma-debug: Allow multiple invocations of overlapping entries Leon Romanovsky
2026-03-07 16:49 ` [PATCH 2/3] dma-mapping: Clarify valid conditions for CPU cache line overlap Leon Romanovsky
2026-03-08 18:19 ` Jason Gunthorpe
2026-03-08 18:49 ` Leon Romanovsky
2026-03-08 23:09 ` Jason Gunthorpe
2026-03-09 9:03 ` Leon Romanovsky
2026-03-09 12:30 ` Marek Szyprowski
2026-03-09 13:20 ` Jason Gunthorpe
2026-03-09 15:05 ` Leon Romanovsky
2026-03-09 15:13 ` Jason Gunthorpe
2026-03-10 9:45 ` Marek Szyprowski [this message]
2026-03-10 12:34 ` Jason Gunthorpe
2026-03-10 18:27 ` Leon Romanovsky
2026-03-10 21:08 ` Marek Szyprowski
2026-03-10 23:34 ` Jason Gunthorpe
2026-03-07 16:49 ` [PATCH 3/3] RDMA/umem: Tell DMA debug that cacheline overlap is expected Leon Romanovsky
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