* [PATCH RFC] virtio-spec: flexible configuration layout
From: Michael S. Tsirkin @ 2011-11-08 21:40 UTC (permalink / raw)
To: Rusty Russell
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, Sasha Levin, Amit Shah, avi
In-Reply-To: <20111102233110.GA20289@redhat.com>
Here's a spec change documenting what my C patch does
(almost - I tweaked the layout a bit, but the idea is the same).
Some more cleanups are needed but I thought I'd send it
for early flames/comments.
The idea is simple: we split functionally unrelated
register groups to independent structures, and let
the device place is anywhere using a capability
in PCI configuration space.
It can then go into MMIO space which is cheaper than PIO.
A legacy portion of the configuration is mirrored
in the first BAR, to keep legacy drivers working.
Any new fields can be added in existing structures
at the end, so they won't affect legacy.
Alternatively we can add new structures with new
structure IDs, pointed to from PCI configuration space.
As we don't yet have devices or drivers with 64 bit features,
I decided we don't need high feature bits in legacy space.
This also frees up feature bit 31 as we don't need it
to enable high feature bits anymore.
As this solves the dynamic placement of MSIX vectors
and high feature bits,
I thought it's easier to just reserve space for that
programming than give it a separate structure. This
can be changed by a patch on top.
Note that data path is split from configuration.
PDF will follow.
----
diff --git a/virtio-spec.lyx b/virtio-spec.lyx
index 6426f8f..5aec38c 100644
--- a/virtio-spec.lyx
+++ b/virtio-spec.lyx
@@ -56,6 +56,7 @@
\html_math_output 0
\html_css_as_file 0
\html_be_strict false
+\author 1986246365 "Michael S. Tsirkin"
\end_header
\begin_body
@@ -570,7 +571,34 @@ Device Configuration
\end_layout
\begin_layout Standard
-To configure the device, we use the first I/O region of the PCI device.
+To configure the device, we
+\change_inserted 1986246365 1320783354
+use I/O and/or memory regions of the PCI device.
+ These contain the virtio header registers, the notification register, the
+ ISR status register and device specific registers, as specified by Virtio
+ Structure PCI Capabilities
+\begin_inset Foot
+status open
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320787659
+For backwards compatibility, devices should present part of these configuration
+ registers in a legacy configuration structure in the first I/O region of
+ the PCI device
+\change_unchanged
+
+\end_layout
+
+\end_inset
+
+.
+\end_layout
+
+\begin_layout Standard
+
+\change_deleted 1986246365 1320766512
+use the first I/O region of the PCI device.
This contains a
\emph on
virtio header
@@ -578,6 +606,8 @@ virtio header
followed by a
\emph on
device-specific region.
+\change_unchanged
+
\end_layout
\begin_layout Standard
@@ -595,9 +625,23 @@ natural
\end_layout
\begin_layout Standard
-Note that this is possible because while the virtio header is PCI (i.e.
- little) endian, the device-specific region is encoded in the native endian
- of the guest (where such distinction is applicable).
+Note that this is possible because while the virtio header
+\change_inserted 1986246365 1320767249
+, notification and ISR status are
+\change_deleted 1986246365 1320767251
+ is
+\change_unchanged
+ PCI (i.e.
+ little) endian, the device-specific
+\change_deleted 1986246365 1320767335
+ region is
+\change_inserted 1986246365 1320767337
+registers are
+\change_unchanged
+ encoded in the native endian of the guest (where such distinction is applicable
+).
+\change_inserted 1986246365 1320767660
+
\end_layout
\begin_layout Subsection
@@ -635,51 +679,2954 @@ Device-specific setup, including reading the Device Feature Bits, discovery
writing the virtio configuration space.
\end_layout
-\begin_layout Enumerate
-The subset of Device Feature Bits understood by the driver is written to
- the device.
+\begin_layout Enumerate
+The subset of Device Feature Bits understood by the driver is written to
+ the device.
+\end_layout
+
+\begin_layout Enumerate
+The DRIVER_OK status bit is set.
+\end_layout
+
+\begin_layout Enumerate
+The device can now be used (ie.
+ buffers added to the virtqueues)
+\begin_inset Foot
+status open
+
+\begin_layout Plain Layout
+Historically, drivers have used the device before steps 5 and 6.
+ This is only allowed if the driver does not use any features which would
+ alter this early use of the device.
+\end_layout
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+If any of these steps go irrecoverably wrong, the guest should set the FAILED
+ status bit to indicate that it has given up on the device (it can reset
+ the device later to restart if desired).
+\end_layout
+
+\begin_layout Standard
+We now cover the fields required for general setup in detail.
+\change_inserted 1986246365 1320766663
+
+\end_layout
+
+\begin_layout Subsection
+
+\change_inserted 1986246365 1320781584
+Virtio Structure PCI Capability
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320781061
+Virtio configuration layout includes virtio configuration header, notification
+ and ISR status and device configuration structures.
+ Each structure is mapped by a Base Address register (BAR) belonging to
+ the function, located beginning at 10h in Configuration Space.
+
+\emph on
+Structure ID
+\emph default
+indentifies the structure
+\emph on
+, Size
+\emph default
+ indicates the structure size, in bytes, a
+\emph on
+BAR Indicator register (BIR)
+\emph default
+ indicates which BAR, and
+\emph on
+Offset
+\emph default
+ indicates where the structure begins relative to the base address associated
+ with the BAR.
+ The BAR is permitted to be either 32-bit or 64-bit, it can map Memory Space
+ or I/O Space.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320781133
+These registers are specified using vendor-specific PCI capability located
+ on capability list in PCI configuration space of the device.
+ This virtio structure capability uses little-endian format; all bits are
+ read-only:
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320772579
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+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="1" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772055
+Capability ID = 9
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772004
+0
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="1" alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772549
+Size
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="1" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320779698
+BAR Indicator Register
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772007
+4
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="1" alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772540
+Offset
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell multicolumn="2" alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320772011
+8
+\end_layout
+
+\end_inset
+</cell>
+</row>
+</lyxtabular>
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320779667
+Purpose:
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320780912
+
+\emph on
+Capability ID
+\emph default
+,
+\emph on
+Next Capability Pointer
+\emph default
+,
+\emph on
+Capability Length
+\emph default
+ - these fields are specified by PCI local bus specification, Rev 3.0
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320785073
+
+\emph on
+Structure ID
+\emph default
+ - identifies the structure mapped.
+ If an ID representing a specific structure is absent, the structure is
+ located in the legacy virtio configuration in the first PCI BAR.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320782689
+
+\emph on
+Size
+\emph default
+ - size of the structure mapped.
+ This size might include padding, or fields unused by the driver.
+ Drivers are also recommended to only map part of configuration structure
+ large enough for device operation.
+ For example, a future device might present a large structure size of several
+ MBytes.
+ As current devices never utilize structures larger than 4KBytes in size,
+ driver can limit the mapped structure size to e.g.
+ 4KBytes to allow forward compatibility with such devices without loss of
+ functionality and without wasting resources.
+\change_unchanged
+
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320781965
+
+\emph on
+BAR Indicator Register
+\emph default
+ - Indicates which one of the BAR registers, located beginning at 10h in
+ Configuration Space, is used to map the structure into Memory or I/O Space.
+ Legal values are 0 - 5.
+ BAR offset is calculated as
+\emph on
+BAR
+\emph default
+ = 10h + 4 *
+\emph on
+BIR.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320781002
+
+\emph on
+Offset
+\emph default
+ - Used as an offset from the address contained by one of the function’s
+ Base Address registers to point to the base of the structure.
+ Depending on the structure, the lower bits are masked off (set to zero)
+ by software to form an aligned offset.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320785098
+A single device has multiple virtio capabilities on the PCI capability linked-li
+st.
+ To locate a specific register, driver scans the PCI capability list looking
+ for capabilities using the vendor specific
+\emph on
+Capability ID
+\emph default
+, that is
+\emph on
+Capability ID
+\emph default
+ value
+\emph on
+9
+\emph default
+, according to the PCI spec.
+ For each capability, it verifies that the
+\emph on
+Capability Length
+\emph default
+ field matches the expected value (12) - if it doesn't, this indicates a
+ layout change, which causes driver to ignore the specific PCI capability
+ and proceed to the next PCI capability in the list.
+ Next,
+\emph on
+ Structure ID
+\emph default
+ single-byte field is read at offset 3.
+ Unrecognized
+\emph on
+Structure ID
+\emph default
+ values are ignored.
+ Low bits in the
+\emph on
+Offset
+\emph default
+ register are masked to match alignment requirements, if any.
+ Device drivers are recommended to sanity check
+\emph on
+BIR
+\emph default
+,
+\emph on
+Offset
+\emph default
+, and
+\emph on
+Size
+\emph default
+ fields, ignoring the capability or failing gracefully on error.
+ Drivers are also recommended to only map part of configuration structure
+ large enough for device operation.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320786035
+For backwards compatibility, devices should also present legacy configuration
+ space in the first I/O region of the PCI device, mirroring virtio configuration
+ structures in this space.
+ Drivers should fall back on this legacy structure if a specific Virtio
+ Structure capability is missing in the PCI capability list.
+ However, devices are not required to map the whole configuration structure
+ in legacy space - only the initial segment expected by legacy drivers needs
+ to be mapped.
+ The minimal size of such legacy segment size, for each structure, is listed
+ below.
+ Drivers are discouraged from using legacy space if a specific Structure
+ ID is present; this is to allow deprecating the legacy space in the future.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320786428
+Below is the list of supported Virtio structures, including Structure ID,
+ offset alignment, and where it can be located in the legacy configuration
+ space.
+ Note that legacy space layout changes as the MSI-X capability is enabled
+ and disabled
+\begin_inset Foot
+status open
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786428
+ie.
+ once you enable MSI-X on the device, the other fields move.
+ If you turn it off again, they move back!
+\end_layout
+
+\end_inset
+
+.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320786868
+\begin_inset Tabular
+<lyxtabular version="3" rows="5" columns="6">
+<features tabularvalignment="middle">
+<column alignment="center" valignment="top" width="0">
+<column alignment="center" valignment="top" width="0">
+<column alignment="center" valignment="top" width="0">
+<column alignment="center" valignment="top" width="0">
+<column alignment="center" valignment="top" width="0">
+<column alignment="center" valignment="top" width="0">
+<row>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Structure
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+ID
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Alignment
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786921
+Minimal Size
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320785821
+Offset in legacy space
+\change_deleted 1986246365 1320785817
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786926
+Minimal Size in legacy space
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320785855
+Virtio Header
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320785860
+0x1
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786157
+4 bytes
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786225
+28 bytes
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786145
+0
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786236
+24 bytes if MSI-X is enabled, 20 if disabled
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786188
+Queue Notify
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786191
+0x2
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786267
+2 bytes
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786228
+2 bytes
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786505
+16 bytes
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786303
+2 bytes
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786878
+ISR Status
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786260
+0x3
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786270
+1 byte
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786273
+1 byte
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786534
+19 bytes
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786306
+1 byte
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786847
+Device Header
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786474
+0x4
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786477
+1 byte
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786487
+Device specific
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786513
+24 bytes if MSI-X is enabled, 20 if disabled
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786492
+Device specific
+\end_layout
+
+\end_inset
+</cell>
+</row>
+</lyxtabular>
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320786973
+Drivers should assume that each structure size can be extended in the future.
+\end_layout
+
+\begin_layout Standard
+
+\change_inserted 1986246365 1320787003
+Queue Notify and ISR status are single-field registers.
+ Device Header has device specific structure.
+ Virtio Header structure is documented below.
+\change_unchanged
+
+\end_layout
+
+\begin_layout Subsection
+Virtio Header
+\end_layout
+
+\begin_layout Standard
+The virtio header looks as follows:
+\end_layout
+
+\begin_layout Standard
+\begin_inset Tabular
+<lyxtabular version="3" rows="4" columns="9">
+<features tabularvalignment="middle">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Bits
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+32
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+32
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+32
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+16
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+16
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+16
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+8
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+8
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Read/Write
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Purpose
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Device
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Guest
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Queue
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Queue
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Queue
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786386
+
+\size footnotesize
+Reserved
+\change_deleted 1986246365 1320786378
+Queue
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Device
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786393
+
+\size footnotesize
+Reserved
+\change_deleted 1986246365 1320786390
+ISR
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Features bits 0:31
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Features bits 0:31
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Address
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Size
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Select
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_deleted 1986246365 1320786378
+
+\size footnotesize
+Notify
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Status
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\change_deleted 1986246365 1320786388
+
+\size footnotesize
+Status
+\change_unchanged
+
+\end_layout
+
+\end_inset
+</cell>
+</row>
+</lyxtabular>
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+
+\change_deleted 1986246365 1320786398
+If MSI-X is enabled for the device, two additional fields immediately follow
+ this header:
+\begin_inset Foot
+status open
+
+\begin_layout Plain Layout
+ie.
+ once you enable MSI-X on the device, the other fields move.
+ If you turn it off again, they move back!
+\end_layout
+
+\end_inset
+
+
+\change_unchanged
+
+\end_layout
+
+\begin_layout Standard
+\begin_inset Tabular
+<lyxtabular version="3" rows="4" columns="3">
+<features tabularvalignment="middle">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Bits
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+16
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+16
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Read/Write
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Purpose
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Configuration
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Queue
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+(MSI-X)
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Vector
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Vector
+\end_layout
+
+\end_inset
+</cell>
+</row>
+</lyxtabular>
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+
+\change_deleted 1986246365 1320786816
+Finally, if feature bits (VIRTIO_F_FEATURES_HI)
+\change_unchanged
+ this is immediately followed by two additional fields:
+\end_layout
+
+\begin_layout Standard
+\begin_inset Tabular
+<lyxtabular version="3" rows="4" columns="3">
+<features tabularvalignment="middle">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Bits
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+32
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+32
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Read/Write
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+R+W
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Purpose
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Device
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Guest
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Features bits 32:63
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Features bits 32:63
+\end_layout
+
+\end_inset
+</cell>
+</row>
+</lyxtabular>
+
+\end_inset
+
+
+\end_layout
+
+\begin_layout Standard
+
+\change_deleted 1986246365 1320786783
+Immediately following these general headers, there may be device-specific
+ headers:
+\end_layout
+
+\begin_layout Standard
+
+\change_deleted 1986246365 1320786783
+\begin_inset Tabular
+<lyxtabular version="3" rows="4" columns="2">
+<features tabularvalignment="middle">
+<column alignment="left" valignment="top" width="0">
+<column alignment="left" valignment="top" width="0">
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Bits
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Device Specific
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Read/Write
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Device Specific
+\end_layout
+
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+Purpose
+\end_layout
+
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
+\size footnotesize
+Device Specific...
\end_layout
-\begin_layout Enumerate
-The DRIVER_OK status bit is set.
+\end_inset
+</cell>
+</row>
+<row>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
+
+\begin_layout Plain Layout
+
\end_layout
-\begin_layout Enumerate
-The device can now be used (ie.
- buffers added to the virtqueues)
-\begin_inset Foot
-status open
+\end_inset
+</cell>
+<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
+\begin_inset Text
\begin_layout Plain Layout
-Historically, drivers have used the device before steps 5 and 6.
- This is only allowed if the driver does not use any features which would
- alter this early use of the device.
+
\end_layout
\end_inset
+</cell>
+</row>
+</lyxtabular>
+\end_inset
-\end_layout
-\begin_layout Standard
-If any of these steps go irrecoverably wrong, the guest should set the FAILED
- status bit to indicate that it has given up on the device (it can reset
- the device later to restart if desired).
-\end_layout
+\change_inserted 1986246365 1320784618
-\begin_layout Standard
-We now cover the fields required for general setup in detail.
\end_layout
\begin_layout Subsection
-Virtio Header
+
+\change_inserted 1986246365 1320786351
+Legacy Virtio Header
\end_layout
\begin_layout Standard
-The virtio header looks as follows:
+
+\change_inserted 1986246365 1320786351
+For reference, the legacy virtio header looks as follows; one observes that
+ most register offsets match the new virtio header, to make compatibility
+ easier:
\end_layout
\begin_layout Standard
+
+\change_inserted 1986246365 1320786351
\begin_inset Tabular
<lyxtabular version="3" rows="4" columns="9">
<features tabularvalignment="middle">
@@ -697,6 +3644,8 @@ The virtio header looks as follows:
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Bits
\end_layout
@@ -706,6 +3655,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
32
\end_layout
@@ -715,6 +3666,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
32
\end_layout
@@ -724,6 +3677,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
32
\end_layout
@@ -733,6 +3688,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
16
\end_layout
@@ -742,6 +3699,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
16
\end_layout
@@ -751,6 +3710,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
16
\end_layout
@@ -760,6 +3721,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
8
\end_layout
@@ -769,6 +3732,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
8
\end_layout
@@ -780,6 +3745,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Read/Write
\end_layout
@@ -789,6 +3756,8 @@ Read/Write
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R
\end_layout
@@ -798,6 +3767,8 @@ R
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -807,6 +3778,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -816,6 +3789,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R
\end_layout
@@ -825,6 +3800,8 @@ R
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -834,6 +3811,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -843,6 +3822,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -852,6 +3833,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R
\end_layout
@@ -863,6 +3846,8 @@ R
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Purpose
\end_layout
@@ -873,6 +3858,8 @@ Purpose
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Device
\end_layout
@@ -884,6 +3871,8 @@ Device
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Guest
\end_layout
@@ -895,6 +3884,8 @@ Guest
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Queue
\end_layout
@@ -906,6 +3897,8 @@ Queue
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Queue
\end_layout
@@ -917,6 +3910,8 @@ Queue
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Queue
\end_layout
@@ -928,6 +3923,8 @@ Queue
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Queue
\end_layout
@@ -939,6 +3936,8 @@ Queue
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Device
\end_layout
@@ -950,6 +3949,8 @@ Device
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
ISR
\end_layout
@@ -963,6 +3964,8 @@ ISR
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\end_layout
\end_inset
@@ -972,6 +3975,8 @@ ISR
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Features bits 0:31
\end_layout
@@ -983,6 +3988,8 @@ Features bits 0:31
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Features bits 0:31
\end_layout
@@ -994,6 +4001,8 @@ Features bits 0:31
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Address
\end_layout
@@ -1005,6 +4014,8 @@ Address
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Size
\end_layout
@@ -1016,6 +4027,8 @@ Size
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Select
\end_layout
@@ -1027,6 +4040,8 @@ Select
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Notify
\end_layout
@@ -1038,6 +4053,8 @@ Notify
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Status
\end_layout
@@ -1049,6 +4066,8 @@ Status
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Status
\end_layout
@@ -1064,12 +4083,16 @@ Status
\end_layout
\begin_layout Standard
+
+\change_inserted 1986246365 1320786351
If MSI-X is enabled for the device, two additional fields immediately follow
this header:
\begin_inset Foot
status collapsed
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
ie.
once you enable MSI-X on the device, the other fields move.
If you turn it off again, they move back!
@@ -1081,6 +4104,8 @@ ie.
\end_layout
\begin_layout Standard
+
+\change_inserted 1986246365 1320786351
\begin_inset Tabular
<lyxtabular version="3" rows="4" columns="3">
<features tabularvalignment="middle">
@@ -1092,6 +4117,8 @@ ie.
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Bits
\end_layout
@@ -1101,6 +4128,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
16
\end_layout
@@ -1110,6 +4139,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
16
\end_layout
@@ -1121,6 +4152,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Read/Write
\end_layout
@@ -1130,6 +4163,8 @@ Read/Write
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -1139,6 +4174,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
R+W
\end_layout
@@ -1150,6 +4187,8 @@ R+W
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Purpose
\end_layout
@@ -1160,6 +4199,8 @@ Purpose
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Configuration
\end_layout
@@ -1171,6 +4212,8 @@ Configuration
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Queue
\end_layout
@@ -1183,6 +4226,8 @@ Queue
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
(MSI-X)
\end_layout
@@ -1193,16 +4238,7 @@ Queue
\begin_layout Plain Layout
-\size footnotesize
-Vector
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
\size footnotesize
Vector
@@ -1210,145 +4246,15 @@ Vector
\end_inset
</cell>
-</row>
-</lyxtabular>
-
-\end_inset
-
-
-\end_layout
-
-\begin_layout Standard
-Finally, if feature bits (VIRTIO_F_FEATURES_HI) this is immediately followed
- by two additional fields:
-\end_layout
-
-\begin_layout Standard
-\begin_inset Tabular
-<lyxtabular version="3" rows="4" columns="3">
-<features tabularvalignment="middle">
-<column alignment="left" valignment="top" width="0">
-<column alignment="left" valignment="top" width="0">
-<column alignment="left" valignment="top" width="0">
-<row>
-<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-Bits
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-32
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-32
-\end_layout
-
-\end_inset
-</cell>
-</row>
-<row>
-<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-Read/Write
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-R
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-R+W
-\end_layout
-
-\end_inset
-</cell>
-</row>
-<row>
-<cell alignment="center" valignment="top" topline="true" leftline="true" rightline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-Purpose
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-
-\size footnotesize
-Device
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" topline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-
-\size footnotesize
-Guest
-\end_layout
-
-\end_inset
-</cell>
-</row>
-<row>
<cell alignment="center" valignment="top" bottomline="true" leftline="true" rightline="true" usebox="none">
\begin_inset Text
\begin_layout Plain Layout
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
-
-\size footnotesize
-Features bits 32:63
-\end_layout
-
-\end_inset
-</cell>
-<cell alignment="center" valignment="top" bottomline="true" leftline="true" usebox="none">
-\begin_inset Text
-
-\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
\size footnotesize
-Features bits 32:63
+Vector
\end_layout
\end_inset
@@ -1362,11 +4268,15 @@ Features bits 32:63
\end_layout
\begin_layout Standard
-Immediately following these general headers, there may be device-specific
+
+\change_inserted 1986246365 1320786351
+Immediately following these general headers, there may be legacy device-specific
headers:
\end_layout
\begin_layout Standard
+
+\change_inserted 1986246365 1320786351
\begin_inset Tabular
<lyxtabular version="3" rows="4" columns="2">
<features tabularvalignment="middle">
@@ -1377,6 +4287,8 @@ Immediately following these general headers, there may be device-specific
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Bits
\end_layout
@@ -1386,6 +4298,8 @@ Bits
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Device Specific
\end_layout
@@ -1397,6 +4311,8 @@ Device Specific
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Read/Write
\end_layout
@@ -1406,6 +4322,8 @@ Read/Write
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Device Specific
\end_layout
@@ -1417,6 +4335,8 @@ Device Specific
\begin_inset Text
\begin_layout Plain Layout
+
+\change_inserted 1986246365 1320786351
Purpose
\end_layout
@@ -1427,6 +4347,8 @@ Purpose
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\size footnotesize
Device Specific...
\end_layout
@@ -1440,6 +4362,8 @@ Device Specific...
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\end_layout
\end_inset
@@ -1449,6 +4373,8 @@ Device Specific...
\begin_layout Plain Layout
+\change_inserted 1986246365 1320786351
+
\end_layout
\end_inset
@@ -1461,6 +4387,15 @@ Device Specific...
\end_layout
+\begin_layout Standard
+
+\change_inserted 1986246365 1320786619
+Legacy device-specific headers are supported for backwards compatibility.
+ As such, they are not required to map the whole device configuration structure
+ - only the initial segment expected by legacy drivers needs to be mapped.
+ The size of such legacy segment size is device specific.
+\end_layout
+
\begin_layout Subsubsection
Device Status
\end_layout
@@ -1531,8 +4466,10 @@ name "sub:Feature-Bits"
The least significant 31 bits of the first configuration field indicates
the features that the device supports (the high bit is reserved, and will
be used to indicate the presence of future feature bits elsewhere).
- If more than 31 feature bits are supported, the device indicates so by
- setting feature bit 31 (see
+
+\change_deleted 1986246365 1320784929
+If more than 31 feature bits are supported, the device indicates so by setting
+ feature bit 31 (see
\begin_inset CommandInset ref
LatexCommand ref
reference "cha:Reserved-Feature-Bits"
@@ -1540,7 +4477,9 @@ reference "cha:Reserved-Feature-Bits"
\end_inset
).
- The bits are allocated as follows:
+
+\change_unchanged
+The bits are allocated as follows:
\end_layout
\begin_layout Description
@@ -1615,10 +4554,14 @@ This allows for forwards and backwards compatibility: if the device is enhanced
\end_layout
\begin_layout Standard
+
+\change_deleted 1986246365 1320784940
Access to feature bits 32 to 63 is enabled by Guest by setting feature bit
31.
If this bit is unset, Device must assume that all feature bits > 31 are
unset.
+\change_unchanged
+
\end_layout
\begin_layout Subsubsection
@@ -1629,10 +4572,14 @@ Configuration/Queue Vectors
When MSI-X capability is present and enabled in the device (through standard
PCI configuration space) 4 bytes at byte offset 20 are used to map configuratio
n change and queue interrupts to MSI-X vectors.
- In this case, the ISR Status field is unused, and device specific configuration
- starts at byte offset 24 in virtio header structure.
+ In this case, the ISR Status field is unused
+\change_deleted 1986246365 1320784981
+, and device specific configuration starts at byte offset 24 in virtio header
+ structure.
When MSI-X capability is not enabled, device specific configuration starts
- at byte offset 20 in virtio header.
+ at byte offset 20 in virtio header
+\change_unchanged
+.
\end_layout
\begin_layout Standard
_______________________________________________
Virtualization mailing list
Virtualization@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/virtualization
^ permalink raw reply related
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Michael S. Tsirkin @ 2011-11-08 21:41 UTC (permalink / raw)
To: Rusty Russell
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, virtualization, Christian Borntraeger,
Sasha Levin, Amit Shah, avi
In-Reply-To: <20111108214021.GA4538@redhat.com>
[-- Attachment #1: Type: text/plain, Size: 65 bytes --]
> PDF will follow.
Attached for the lyx challenged :)
--
MST
[-- Attachment #2: virtio-spec.pdf --]
[-- Type: application/pdf, Size: 316465 bytes --]
[-- Attachment #3: Type: text/plain, Size: 183 bytes --]
_______________________________________________
Virtualization mailing list
Virtualization@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/virtualization
^ permalink raw reply
* [PATCH RFC v3 0/3] Support multiple VirtioConsoles.
From: Miche Baker-Harvey @ 2011-11-08 21:44 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Stephen Rothwell, xen-devel, Konrad Rzeszutek Wilk,
Benjamin Herrenschmidt, linux-kernel, virtualization,
Anton Blanchard, Amit Shah, Mike Waychison, ppc-dev,
Eric Northrup
(Amit pointed out that the patches never went out. This was a resend of
the series meant to go out on 11/2/2011; Now it's a resend of the mail this
morning, with everyone copied on the same mail. So sorry for the spam!
This is v3.)
This patchset applies to linux-next/next-20111102.
This series implements support for multiple virtio_consoles using KVM.
This patchset addresses several issues associated with trying to
establish multiple virtio consoles.
I'm trying to start a guest via KVM that supports multiple virtual
consoles, with getty's on each, and with some being console devices.
These patches let me establish more than one VirtioConsole (I'm
running eight at the moment), and enable console output appearing on
one of them. It still doesn't successfully generate console output on
multiple VirtioConsoles.
Let me apologise for my last patch having gotten into Linus' tree, and
leaving other people to deal with crashes. I had meant to be asking
for guidance, but I didn't mark it as "RFC".
This series reflects the input from Konrad Rzeszutek, Amit Shah, Stephen
Boyd, and Rusty Russell. I think we do have to limit hvc_alloc() to one
thread.
I would appreciate any comments or feedback, or accept if appropriate.
Thanks,
Miche Baker-Harvey
---
Miche Baker-Harvey (3):
virtio_console: Fix locking of vtermno.
hvc_init(): Enforce one-time initialization.
Use separate struct console structure for each hvc_console.
drivers/char/virtio_console.c | 9 ++++++---
drivers/tty/hvc/hvc_console.c | 33 +++++++++++++++++++++++++++++++--
drivers/tty/hvc/hvc_console.h | 1 +
3 files changed, 38 insertions(+), 5 deletions(-)
--
^ permalink raw reply
* [PATCH v3 1/3] virtio_console: Fix locking of vtermno.
From: Miche Baker-Harvey @ 2011-11-08 21:44 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Stephen Rothwell, xen-devel, Konrad Rzeszutek Wilk,
Benjamin Herrenschmidt, linux-kernel, virtualization,
Anton Blanchard, Amit Shah, Mike Waychison, ppc-dev,
Eric Northrup
In-Reply-To: <20111108214452.28884.14840.stgit@miche.sea.corp.google.com>
Some modifications of vtermno were not done under the spinlock.
Moved assignment from vtermno and increment of vtermno together,
putting both under the spinlock. Revert vtermno on failure.
Signed-off-by: Miche Baker-Harvey <miche@google.com>
---
drivers/char/virtio_console.c | 9 ++++++---
1 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c
index 8e3c46d..9722e76 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/char/virtio_console.c
@@ -987,18 +987,21 @@ int init_port_console(struct port *port)
* pointers. The final argument is the output buffer size: we
* can do any size, so we put PAGE_SIZE here.
*/
- port->cons.vtermno = pdrvdata.next_vtermno;
+ spin_lock_irq(&pdrvdata_lock);
+ port->cons.vtermno = pdrvdata.next_vtermno++;
+ spin_unlock_irq(&pdrvdata_lock);
port->cons.hvc = hvc_alloc(port->cons.vtermno, 0, &hv_ops, PAGE_SIZE);
+ spin_lock_irq(&pdrvdata_lock);
if (IS_ERR(port->cons.hvc)) {
ret = PTR_ERR(port->cons.hvc);
dev_err(port->dev,
"error %d allocating hvc for port\n", ret);
port->cons.hvc = NULL;
+ port->cons.vtermno = pdrvdata.next_vtermno--;
+ spin_unlock_irq(&pdrvdata_lock);
return ret;
}
- spin_lock_irq(&pdrvdata_lock);
- pdrvdata.next_vtermno++;
list_add_tail(&port->cons.list, &pdrvdata.consoles);
spin_unlock_irq(&pdrvdata_lock);
port->guest_connected = true;
^ permalink raw reply related
* [PATCH v3 2/3] hvc_init(): Enforce one-time initialization.
From: Miche Baker-Harvey @ 2011-11-08 21:45 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Stephen Rothwell, xen-devel, Konrad Rzeszutek Wilk,
Benjamin Herrenschmidt, linux-kernel, virtualization,
Anton Blanchard, Amit Shah, Mike Waychison, ppc-dev,
Eric Northrup
In-Reply-To: <20111108214452.28884.14840.stgit@miche.sea.corp.google.com>
hvc_init() must only be called once, and no thread should continue with hvc_alloc()
until after initialization is complete. The original code does not enforce either
of these requirements. A new mutex limits entry to hvc_init() to a single thread,
and blocks all later comers until it has completed.
This patch fixes multiple crash symptoms.
Signed-off-by: Miche Baker-Harvey <miche@google.com>
---
drivers/tty/hvc/hvc_console.c | 13 +++++++++++--
1 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index b6b2d18..09a6159 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -29,8 +29,9 @@
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/list.h>
-#include <linux/module.h>
#include <linux/major.h>
+#include <linux/module.h>
+#include <linux/mutex.h>
#include <linux/sysrq.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
@@ -84,6 +85,10 @@ static LIST_HEAD(hvc_structs);
* list traversal.
*/
static DEFINE_SPINLOCK(hvc_structs_lock);
+/*
+ * only one task does allocation at a time.
+ */
+static DEFINE_MUTEX(hvc_ports_mutex);
/*
* This value is used to assign a tty->index value to a hvc_struct based
@@ -825,11 +830,15 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
int i;
/* We wait until a driver actually comes along */
+ mutex_lock(&hvc_ports_mutex);
if (!hvc_driver) {
int err = hvc_init();
- if (err)
+ if (err) {
+ mutex_unlock(&hvc_ports_mutex);
return ERR_PTR(err);
+ }
}
+ mutex_unlock(&hvc_ports_mutex);
hp = kzalloc(ALIGN(sizeof(*hp), sizeof(long)) + outbuf_size,
GFP_KERNEL);
^ permalink raw reply related
* [PATCH v3 3/3] Use separate struct console structure for each hvc_console.
From: Miche Baker-Harvey @ 2011-11-08 21:45 UTC (permalink / raw)
To: Greg Kroah-Hartman
Cc: Stephen Rothwell, xen-devel, Konrad Rzeszutek Wilk,
Benjamin Herrenschmidt, linux-kernel, virtualization,
Anton Blanchard, Amit Shah, Mike Waychison, ppc-dev,
Eric Northrup
In-Reply-To: <20111108214452.28884.14840.stgit@miche.sea.corp.google.com>
It is possible to make any virtio_console port be a console
by sending VIRITO_CONSOLE_CONSOLE_PORT. But hvc_alloc was
using a single struct console hvc_console, which contains
both an index and flags which are per-port.
This adds a separate struct console for each virtio_console
that is CONSOLE_PORT.
Signed-off-by: Miche Baker-Harvey <miche@google.com>
---
drivers/tty/hvc/hvc_console.c | 20 ++++++++++++++++++++
drivers/tty/hvc/hvc_console.h | 1 +
2 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index 09a6159..24a84d6 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -247,6 +247,7 @@ static void destroy_hvc_struct(struct kref *kref)
spin_unlock(&hvc_structs_lock);
+ kfree(hp->hvc_console);
kfree(hp);
}
@@ -827,6 +828,7 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
int outbuf_size)
{
struct hvc_struct *hp;
+ struct console *cp;
int i;
/* We wait until a driver actually comes along */
@@ -854,6 +856,17 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
kref_init(&hp->kref);
INIT_WORK(&hp->tty_resize, hvc_set_winsz);
+ /*
+ * Make each console its own struct console.
+ */
+ cp = kmemdup(&hvc_console, sizeof(*cp), GFP_KERNEL);
+ if (!cp) {
+ kfree(hp);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ hp->hvc_console = cp;
+
spin_lock_init(&hp->lock);
spin_lock(&hvc_structs_lock);
@@ -872,8 +885,13 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
hp->index = i;
+ cp->index = i;
+ vtermnos[i] = vtermno;
+ cons_ops[i] = ops;
+
list_add_tail(&(hp->next), &hvc_structs);
spin_unlock(&hvc_structs_lock);
+ register_console(cp);
return hp;
}
@@ -884,6 +902,8 @@ int hvc_remove(struct hvc_struct *hp)
unsigned long flags;
struct tty_struct *tty;
+ BUG_ON(!hp->hvc_console);
+ unregister_console(hp->hvc_console);
spin_lock_irqsave(&hp->lock, flags);
tty = tty_kref_get(hp->tty);
diff --git a/drivers/tty/hvc/hvc_console.h b/drivers/tty/hvc/hvc_console.h
index c335a14..2d20ab7 100644
--- a/drivers/tty/hvc/hvc_console.h
+++ b/drivers/tty/hvc/hvc_console.h
@@ -58,6 +58,7 @@ struct hvc_struct {
const struct hv_ops *ops;
int irq_requested;
int data;
+ struct console *hvc_console;
struct winsize ws;
struct work_struct tty_resize;
struct list_head next;
^ permalink raw reply related
* RE: [PATCH 1/1] Staging: hv: Move the mouse driver out of staging
From: KY Srinivasan @ 2011-11-09 0:45 UTC (permalink / raw)
To: Dmitry Torokhov
Cc: gregkh@suse.de, linux-kernel@vger.kernel.org,
devel@linuxdriverproject.org, virtualization@lists.osdl.org,
ohering@suse.com, joe@perches.com, jkosina@suse.cz
In-Reply-To: <20111107055109.GA21095@core.coreip.homeip.net>
> -----Original Message-----
> From: Dmitry Torokhov [mailto:dmitry.torokhov@gmail.com]
> Sent: Monday, November 07, 2011 12:51 AM
> To: KY Srinivasan
> Cc: gregkh@suse.de; linux-kernel@vger.kernel.org;
> devel@linuxdriverproject.org; virtualization@lists.osdl.org; ohering@suse.com;
> joe@perches.com; jkosina@suse.cz
> Subject: Re: [PATCH 1/1] Staging: hv: Move the mouse driver out of staging
>
> Hi K. Y,
>
> On Mon, Nov 07, 2011 at 01:04:53AM +0000, KY Srinivasan wrote:
> >
> >
> > > -----Original Message-----
> > > From: Dmitry Torokhov [mailto:dmitry.torokhov@gmail.com]
> > > Sent: Saturday, November 05, 2011 2:48 AM
> > > To: KY Srinivasan
> > > Cc: gregkh@suse.de; linux-kernel@vger.kernel.org;
> > > devel@linuxdriverproject.org; virtualization@lists.osdl.org;
> ohering@suse.com;
> > > joe@perches.com; jkosina@suse.cz
> > > Subject: Re: [PATCH 1/1] Staging: hv: Move the mouse driver out of staging
> > >
> > > Hi KY,
> >
> > Dimitry,
> >
> > Let me begin by thanking you for taking the time to review. I have incorporated
> > pretty much all your suggestions.
>
> Thank you very much for considering my suggestions.
>
> > >
> > > Instead of potentially ever-increasing buffer that you also allocate
> > > (and it looks like leaking on every callback invocation) can you just
> > > repeat the read if you know that there are more data and use single
> > > pre-allocated buffer?
> >
> > The ring-buffer protocol is such that we need to consume the full message.
> > Also, why do you say we are leaking memory?
>
> Ah, OK, I see, we keep reading until read returns 0-sized reply and then
> we free the buffer... Never mind then.
>
> > > > +
> > > > + hid_dev->ll_driver = &mousevsc_ll_driver;
> > > > + hid_dev->driver = &mousevsc_hid_driver;
> > >
> > > You are not really hid driver; you are more of a "provider" so why do
> > > you need to set hid_dev->driver in addition to hid_dev->ll_driver?
> > >
> > True, but hid_parse_report() expects that the driver field be set; so I
> > need to fake this.
>
> If you supply .parse() method for your mousevsc_ll_driver structure and
> call hid_parse_report() from it then HID core will set the default
> driver and call parse at appropriate time.
Would it be ok if I were to make this change after Jiri accepts the driver out of staging?
>
> >
> > > > + hid_dev->bus = BUS_VIRTUAL;
> > > > + hid_dev->vendor = input_dev->hid_dev_info.vendor;
> > > > + hid_dev->product = input_dev->hid_dev_info.product;
> > > > + hid_dev->version = input_dev->hid_dev_info.version;
> > > > + input_dev->hid_device = hid_dev;
> > > > +
> > > > + sprintf(hid_dev->name, "%s", "Microsoft Vmbus HID-compliant Mouse");
> > >
> > > strlcpy?
> > >
> > > > +
> > > > + ret = hid_parse_report(hid_dev, input_dev->report_desc,
> > > > + input_dev->report_desc_size);
> > > > +
> > > > + if (ret) {
> > > > + hid_err(hid_dev, "parse failed\n");
> > > > + goto probe_err1;
> > > > + }
> > > > +
> > > > + ret = hid_hw_start(hid_dev, HID_CONNECT_HIDINPUT |
> > > HID_CONNECT_HIDDEV);
> > >
> > > Why do you need to call hid_hw_start instead of letting HID core figure
> > > it out for you?
> >
> > I am not a hid expert; but all hid low level drivers appear to do this.
> > Initially, I was directly invoking hid_connect() directly and based on your
> > Input, I chose to use hid_hw_start() which all other drivers are using.
>
> Note that the users of hid_hw_start() actually are not low level
> drivers, such as usbhid or bluetooth hidp, but higher-level drivers,
> such as hid-wacom, hid-a4tech, etc. Since your driver is a low-level
> driver (a provider so to speak) it should not call hid_hw_start() on its
> own but rather wait for the hid code to do it.
>
> Still, I am not a HID expert either so I'll defer to Jiri here.
I look forward to Jiri's ruling here. On a different note, you had asked me to
make a couple of structures const structures that were statically initialized - the
ack structure and the request structure. I am running into some issues doing that.
The low level ring buffer code uses struct scatterlists and for some reason the behavior
of dynamically allocated structures (as well as stack variables) is different when it comes to
the following transformation: VA ->Page->VA. For dynamically allocated data this transformation
gives us the original VA; while for module global data, this transformation gives me a different VA.
And so, after I made the change you had recommended (making the two variables static variables),
the driver does not work and I have tracked this problem to the transformation noted earlier. Is this
transformation not valid for static data?
If it is ok with you, I will send the patch out with all the other cleanup that you had suggested.
Regards,
K. Y
^ permalink raw reply
* Re: [PATCH v3 2/3] hvc_init(): Enforce one-time initialization.
From: Michael Ellerman @ 2011-11-09 7:24 UTC (permalink / raw)
To: Miche Baker-Harvey
Cc: Stephen Rothwell, Greg Kroah-Hartman, Konrad Rzeszutek Wilk,
linux-kernel, virtualization, xen-devel, Anton Blanchard,
Amit Shah, Mike Waychison, ppc-dev, Eric Northrup
In-Reply-To: <20111108214504.28884.61814.stgit@miche.sea.corp.google.com>
[-- Attachment #1.1: Type: text/plain, Size: 1534 bytes --]
On Tue, 2011-11-08 at 13:45 -0800, Miche Baker-Harvey wrote:
> hvc_init() must only be called once, and no thread should continue with hvc_alloc()
> until after initialization is complete. The original code does not enforce either
> of these requirements. A new mutex limits entry to hvc_init() to a single thread,
> and blocks all later comers until it has completed.
>
> This patch fixes multiple crash symptoms.
Hi Miche,
A few nit-picky comments below ..
> @@ -84,6 +85,10 @@ static LIST_HEAD(hvc_structs);
> * list traversal.
> */
> static DEFINE_SPINLOCK(hvc_structs_lock);
> +/*
> + * only one task does allocation at a time.
> + */
> +static DEFINE_MUTEX(hvc_ports_mutex);
The comment is wrong, isn't it? Only one task does _init_ at a time.
Once the driver is initialised allocs can run concurrently.
So shouldn't it be called hvc_init_mutex ?
> @@ -825,11 +830,15 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
> int i;
>
> /* We wait until a driver actually comes along */
> + mutex_lock(&hvc_ports_mutex);
> if (!hvc_driver) {
> int err = hvc_init();
> - if (err)
> + if (err) {
> + mutex_unlock(&hvc_ports_mutex);
> return ERR_PTR(err);
> + }
> }
> + mutex_unlock(&hvc_ports_mutex);
>
> hp = kzalloc(ALIGN(sizeof(*hp), sizeof(long)) + outbuf_size,
> GFP_KERNEL);
It'd be cleaner I think to do all the locking in hvc_init(). That's safe
as long as you recheck !hvc_driver in hvc_init() with the lock held.
cheers
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^ permalink raw reply
* Re: [PATCH v3 3/3] Use separate struct console structure for each hvc_console.
From: Michael Ellerman @ 2011-11-09 8:05 UTC (permalink / raw)
To: Miche Baker-Harvey
Cc: Stephen Rothwell, Greg Kroah-Hartman, Konrad Rzeszutek Wilk,
linux-kernel, virtualization, xen-devel, Anton Blanchard,
Amit Shah, Mike Waychison, ppc-dev, Eric Northrup
In-Reply-To: <20111108214509.28884.98169.stgit@miche.sea.corp.google.com>
[-- Attachment #1.1: Type: text/plain, Size: 2758 bytes --]
On Tue, 2011-11-08 at 13:45 -0800, Miche Baker-Harvey wrote:
> It is possible to make any virtio_console port be a console
> by sending VIRITO_CONSOLE_CONSOLE_PORT. But hvc_alloc was
> using a single struct console hvc_console, which contains
> both an index and flags which are per-port.
>
> This adds a separate struct console for each virtio_console
> that is CONSOLE_PORT.
Hi Miche,
I'm testing this on powerpc and unfortunately it's working a little _too
well_. I end up with two struct consoles registered and so I get every
line of output twice :)
The problem is that we're registering two struct consoles. The first
obviously is hvc_console, either in hvc_console_init(), or in my case
from hvc_instantiate().
Then we register the allocated one in hvc_alloc(). But because they both
point back to the same hardware you get duplicate output.
We _do_ want to register a console early, in either/both
hvc_console_init() and hvc_instantiate(), because we want to have
console during boot prior to when hvc_alloc() gets called.
I think maybe we should be checking in hvc_alloc() whether we already
have hvc_console associated with the vtermno and if so we use
hvc_console instead of allocating a new one.
Patch below to do that, and works for me, but it's a bit of a hack,
there must be a better solution.
Finally I'm not sure how your patch affects the code in hvc_poll() which
checks hvc_console.index to do the SYSRQ hack.
cheers
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index fff35da..b249195 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -815,13 +815,15 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
kref_init(&hp->kref);
INIT_WORK(&hp->tty_resize, hvc_set_winsz);
- /*
- * Make each console its own struct console.
- */
- cp = kmemdup(&hvc_console, sizeof(*cp), GFP_KERNEL);
- if (!cp) {
- kfree(hp);
- return ERR_PTR(-ENOMEM);
+
+ if (hvc_console.index >= 0 && vtermnos[hvc_console.index] == hp->vtermno)
+ cp = &hvc_console;
+ else {
+ cp = kmemdup(&hvc_console, sizeof(*cp), GFP_KERNEL);
+ if (!cp) {
+ kfree(hp);
+ return ERR_PTR(-ENOMEM);
+ }
}
hp->hvc_console = cp;
@@ -850,7 +852,9 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
list_add_tail(&(hp->next), &hvc_structs);
spin_unlock(&hvc_structs_lock);
- register_console(cp);
+
+ if (cp != &hvc_console)
+ register_console(cp);
return hp;
}
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^ permalink raw reply related
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 8:46 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, avi, Amit Shah
In-Reply-To: <20111108214021.GA4538@redhat.com>
On Tue, 2011-11-08 at 23:40 +0200, Michael S. Tsirkin wrote:
> Here's a spec change documenting what my C patch does
> (almost - I tweaked the layout a bit, but the idea is the same).
> Some more cleanups are needed but I thought I'd send it
> for early flames/comments.
>
> The idea is simple: we split functionally unrelated
> register groups to independent structures, and let
> the device place is anywhere using a capability
> in PCI configuration space.
>
> It can then go into MMIO space which is cheaper than PIO.
>
> A legacy portion of the configuration is mirrored
> in the first BAR, to keep legacy drivers working.
> Any new fields can be added in existing structures
> at the end, so they won't affect legacy.
If newer specs add more structures at the end of the config space, and
use the same config space for legacy, that space now becomes device
specific config space and not new-shiny-feature space, so we must
remember to handle those cases.
> Alternatively we can add new structures with new
> structure IDs, pointed to from PCI configuration space.
>
> As we don't yet have devices or drivers with 64 bit features,
> I decided we don't need high feature bits in legacy space.
> This also frees up feature bit 31 as we don't need it
> to enable high feature bits anymore.
KVM tool actually has support for 64bit features, we can probably remove
that when Pekka isn't looking :)
>
> As this solves the dynamic placement of MSIX vectors
> and high feature bits,
> I thought it's easier to just reserve space for that
> programming than give it a separate structure. This
> can be changed by a patch on top.
>
> Note that data path is split from configuration.
>
> PDF will follow.
> ----
>
The device initialization sequence might use an update as well. Maybe
also a description of how device handles missing structure IDs.
[snip]
> +
> +\begin_layout Standard
> +
> +\change_inserted 1986246365 1320781133
> +These registers are specified using vendor-specific PCI capability located
> + on capability list in PCI configuration space of the device.
> + This virtio structure capability uses little-endian format; all bits are
> + read-only:
> +\end_layout
> +
> +\begin_layout Standard
> +
> +\change_inserted 1986246365 1320772579
> +\begin_inset Tabular
Just a note, these tables are way too wide to work properly in PDFs :)
> +<lyxtabular version="3" rows="4" columns="34">
> +<features tabularvalignment="middle">
> +<column alignment="center" valignment="top" width="0pt">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0">
> +<column alignment="center" valignment="top" width="0pt">
> +<row>
[snip]
> +
> +\begin_layout Standard
> +
> +\change_inserted 1986246365 1320779667
> +Purpose:
> +\end_layout
> +
> +\begin_layout Standard
> +
> +\change_inserted 1986246365 1320780912
> +
> +\emph on
> +Capability ID
> +\emph default
> +,
> +\emph on
> +Next Capability Pointer
> +\emph default
> +,
> +\emph on
> +Capability Length
> +\emph default
> + - these fields are specified by PCI local bus specification, Rev 3.0
I'm not sure what capability length is, can't find it in the spec
either.
[snip]
> +\begin_layout Plain Layout
> +ie.
> + once you enable MSI-X on the device, the other fields move.
> + If you turn it off again, they move back!
Is it still true? We're talking about the new layout here (there are
several of this footnote, this one is located right *before* the section
which talks about legacy config space.
[snip]
> +
> +\change_deleted 1986246365 1320784929
> +If more than 31 feature bits are supported, the device indicates so by setting
> + feature bit 31 (see
The bit numbers below this text should be corrected as well.
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 9:55 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, avi, Amit Shah
In-Reply-To: <20111108214021.GA4538@redhat.com>
On Tue, 2011-11-08 at 23:40 +0200, Michael S. Tsirkin wrote:
> Here's a spec change documenting what my C patch does
> (almost - I tweaked the layout a bit, but the idea is the same).
> Some more cleanups are needed but I thought I'd send it
> for early flames/comments.
>
> The idea is simple: we split functionally unrelated
> register groups to independent structures, and let
> the device place is anywhere using a capability
> in PCI configuration space.
I'm also wondering it it's ok to move virtio configuration out of virtio
space and into PCI space for archs that don't have PCI (such as ARM).
Would it mean they get stuck with legacy configuration (and no new
features)? Or is there an alternative for them?
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Michael S. Tsirkin @ 2011-11-09 10:13 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, penberg, avi, Amit Shah
In-Reply-To: <1320828366.31056.16.camel@lappy>
On Wed, Nov 09, 2011 at 10:46:06AM +0200, Sasha Levin wrote:
> On Tue, 2011-11-08 at 23:40 +0200, Michael S. Tsirkin wrote:
> > Here's a spec change documenting what my C patch does
> > (almost - I tweaked the layout a bit, but the idea is the same).
> > Some more cleanups are needed but I thought I'd send it
> > for early flames/comments.
> >
> > The idea is simple: we split functionally unrelated
> > register groups to independent structures, and let
> > the device place is anywhere using a capability
> > in PCI configuration space.
> >
> > It can then go into MMIO space which is cheaper than PIO.
> >
> > A legacy portion of the configuration is mirrored
> > in the first BAR, to keep legacy drivers working.
> > Any new fields can be added in existing structures
> > at the end, so they won't affect legacy.
>
> If newer specs add more structures at the end of the config space, and
> use the same config space for legacy, that space now becomes device
> specific config space and not new-shiny-feature space, so we must
> remember to handle those cases.
Yes. Devices should mirror virtio header and device structures
in MMIO and point Structures there. It seems unavoidable for
device structures (because legacy layout is dynamic
and we don't want to keep doing that), so I thought it's not worth the
trouble for virtio header either.
Notification and ISR Structures can point into PIO.
I'll add some more text to clarify that.
> > Alternatively we can add new structures with new
> > structure IDs, pointed to from PCI configuration space.
> >
> > As we don't yet have devices or drivers with 64 bit features,
> > I decided we don't need high feature bits in legacy space.
> > This also frees up feature bit 31 as we don't need it
> > to enable high feature bits anymore.
>
> KVM tool actually has support for 64bit features, we can probably remove
> that when Pekka isn't looking :)
It's not yet released so maybe it's not an issue yet.
If it's too late I can re-add them to legacy too.
Pekka, 64 features aren't yet used and we are discussing
changing the layout for that field. Mind taking it out
of kvm tool for now?
> >
> > As this solves the dynamic placement of MSIX vectors
> > and high feature bits,
> > I thought it's easier to just reserve space for that
> > programming than give it a separate structure. This
> > can be changed by a patch on top.
> >
> > Note that data path is split from configuration.
> >
> > PDF will follow.
> > ----
> >
>
> The device initialization sequence might use an update as well.
What is needed? Add an item where the driver scans the PCI capability
list to detect the layout?
> Maybe
> also a description of how device handles missing structure IDs.
>
> [snip]
Hmm. I just have
'Drivers should fall back on this legacy structure if a
Virtio Structure capability is missing in the PCI capability
list'.
What else would be helpful? An example?
> > +
> > +\begin_layout Standard
> > +
> > +\change_inserted 1986246365 1320781133
> > +These registers are specified using vendor-specific PCI capability located
> > + on capability list in PCI configuration space of the device.
> > + This virtio structure capability uses little-endian format; all bits are
> > + read-only:
> > +\end_layout
> > +
> > +\begin_layout Standard
> > +
> > +\change_inserted 1986246365 1320772579
> > +\begin_inset Tabular
>
> Just a note, these tables are way too wide to work properly in PDFs :)
True, looks like I need to abbreviate
> > +<lyxtabular version="3" rows="4" columns="34">
> > +<features tabularvalignment="middle">
> > +<column alignment="center" valignment="top" width="0pt">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0">
> > +<column alignment="center" valignment="top" width="0pt">
> > +<row>
>
> [snip]
>
> > +
> > +\begin_layout Standard
> > +
> > +\change_inserted 1986246365 1320779667
> > +Purpose:
> > +\end_layout
> > +
> > +\begin_layout Standard
> > +
> > +\change_inserted 1986246365 1320780912
> > +
> > +\emph on
> > +Capability ID
> > +\emph default
> > +,
> > +\emph on
> > +Next Capability Pointer
> > +\emph default
> > +,
> > +\emph on
> > +Capability Length
> > +\emph default
> > + - these fields are specified by PCI local bus specification, Rev 3.0
>
> I'm not sure what capability length is, can't find it in the spec
> either.
>
> [snip]
It's the legth of the vendor specific capability structure in bytes.
'the byte immediately following the “Next”
pointer in the capability structure is defined to be a length field'
It's on page 330 in my copy.
> > +\begin_layout Plain Layout
> > +ie.
> > + once you enable MSI-X on the device, the other fields move.
> > + If you turn it off again, they move back!
>
> Is it still true? We're talking about the new layout here (there are
> several of this footnote, this one is located right *before* the section
> which talks about legacy config space.
>
> [snip]
Of course not. I'll move the footnote, this only applies to the
legacy naturally.
> > +
> > +\change_deleted 1986246365 1320784929
> > +If more than 31 feature bits are supported, the device indicates so by setting
> > + feature bit 31 (see
>
> The bit numbers below this text should be corrected as well.
Will fix. Thanks!
> --
>
> Sasha.
_______________________________________________
Virtualization mailing list
Virtualization@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/virtualization
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Michael S. Tsirkin @ 2011-11-09 10:18 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, avi, Amit Shah
In-Reply-To: <1320832502.31056.22.camel@lappy>
On Wed, Nov 09, 2011 at 11:55:02AM +0200, Sasha Levin wrote:
> On Tue, 2011-11-08 at 23:40 +0200, Michael S. Tsirkin wrote:
> > Here's a spec change documenting what my C patch does
> > (almost - I tweaked the layout a bit, but the idea is the same).
> > Some more cleanups are needed but I thought I'd send it
> > for early flames/comments.
> >
> > The idea is simple: we split functionally unrelated
> > register groups to independent structures, and let
> > the device place is anywhere using a capability
> > in PCI configuration space.
>
> I'm also wondering it it's ok to move virtio configuration out of virtio
> space and into PCI space for archs that don't have PCI (such as ARM).
A bit of confusion here: no register is moved from memory into
configuration space. Configuration space only gains a list of
pointers into memory/pio space.
> Would it mean they get stuck with legacy configuration (and no new
> features)? Or is there an alternative for them?
The change only affects the layout of virtio PCI. Arches that don't
have PCI don't use virtio PCI, presumably?
BTW, the spec only covers x86 ATM, this needs to be fixed.
>
> --
>
> Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 10:20 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, avi, Amit Shah
In-Reply-To: <20111109101814.GC20612@redhat.com>
On Wed, 2011-11-09 at 12:18 +0200, Michael S. Tsirkin wrote:
> On Wed, Nov 09, 2011 at 11:55:02AM +0200, Sasha Levin wrote:
> > On Tue, 2011-11-08 at 23:40 +0200, Michael S. Tsirkin wrote:
> > > Here's a spec change documenting what my C patch does
> > > (almost - I tweaked the layout a bit, but the idea is the same).
> > > Some more cleanups are needed but I thought I'd send it
> > > for early flames/comments.
> > >
> > > The idea is simple: we split functionally unrelated
> > > register groups to independent structures, and let
> > > the device place is anywhere using a capability
> > > in PCI configuration space.
> >
> > I'm also wondering it it's ok to move virtio configuration out of virtio
> > space and into PCI space for archs that don't have PCI (such as ARM).
>
> A bit of confusion here: no register is moved from memory into
> configuration space. Configuration space only gains a list of
> pointers into memory/pio space.
The definition of the way the virtio configuration space looks is moved
into PCI configuration space, it was constant before.
> > Would it mean they get stuck with legacy configuration (and no new
> > features)? Or is there an alternative for them?
>
> The change only affects the layout of virtio PCI. Arches that don't
> have PCI don't use virtio PCI, presumably?
>
> BTW, the spec only covers x86 ATM, this needs to be fixed.
From what I see there is a WIP by Pawel Moll <pawel.moll@arm.com> to add
virtio platform drivers which get virtio working on ARM for example, and
by Peter Maydell <peter.maydell@linaro.org> to modify the spec to
support MMIO access (besides PCI).
Maybe worth seeing if it works for them...
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Avi Kivity @ 2011-11-09 10:21 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, virtualization, Christian Borntraeger,
Sasha Levin, Amit Shah
In-Reply-To: <20111108214152.GA4622@redhat.com>
On 11/08/2011 11:41 PM, Michael S. Tsirkin wrote:
> > PDF will follow.
>
> Attached for the lyx challenged :)
>
>
The diagrams are truncated.
Otherwise looks reasonable.
--
error compiling committee.c: too many arguments to function
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 10:26 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, penberg, avi, Amit Shah
In-Reply-To: <20111109101318.GB20612@redhat.com>
On Wed, 2011-11-09 at 12:13 +0200, Michael S. Tsirkin wrote:
> On Wed, Nov 09, 2011 at 10:46:06AM +0200, Sasha Levin wrote:
> > The device initialization sequence might use an update as well.
>
> What is needed? Add an item where the driver scans the PCI capability
> list to detect the layout?
Yup, something similar like that - just to make it obvious.
> > Maybe
> > also a description of how device handles missing structure IDs.
> >
> > [snip]
>
> Hmm. I just have
> 'Drivers should fall back on this legacy structure if a
> Virtio Structure capability is missing in the PCI capability
> list'.
>
> What else would be helpful? An example?
I just remembered from your patch that you could define some structure
IDs, but not necessarily all of them, if it's not longer the case then
ignore me. If it is, then the scenario of a missing structure should be
specified (For example, if the ISR structure wasn't defined, fall back
to...).
> > I'm not sure what capability length is, can't find it in the spec
> > either.
> >
> > [snip]
>
> It's the legth of the vendor specific capability structure in bytes.
> 'the byte immediately following the “Next”
> pointer in the capability structure is defined to be a length field'
> It's on page 330 in my copy.
Right, I was looking only at the regular cap definition.
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Pawel Moll @ 2011-11-09 10:47 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, Wang Sheng-Hui, kvm@vger.kernel.org,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List,
virtualization@lists.linux-foundation.org, Christian Borntraeger,
avi@redhat.com, Amit Shah
In-Reply-To: <1320834017.31056.26.camel@lappy>
On Wed, 2011-11-09 at 10:20 +0000, Sasha Levin wrote:
> > > I'm also wondering it it's ok to move virtio configuration out of virtio
> > > space and into PCI space for archs that don't have PCI (such as ARM).
Just a note - ARM-based chips can by all means have PCI (grep -r PCI
arch/arm/ ;-). The fact is that most of the SOCs available on the market
don't have it, but this is slowly changing.
The main architectural difference is that ARM doesn't provide separate
I/O space so the PCI I/O space is usually remapped somewhere into normal
address space (grep -r "#define __io_address" arch/arm/)
> > > Would it mean they get stuck with legacy configuration (and no new
> > > features)? Or is there an alternative for them?
> >
> > The change only affects the layout of virtio PCI. Arches that don't
> > have PCI don't use virtio PCI, presumably?
> >
> > BTW, the spec only covers x86 ATM, this needs to be fixed.
>
> From what I see there is a WIP by Pawel Moll <pawel.moll@arm.com> to add
> virtio platform drivers which get virtio working on ARM for example, and
> by Peter Maydell <peter.maydell@linaro.org> to modify the spec to
> support MMIO access (besides PCI).
Yep, it's actually already in 3.2-rc1 (drivers/virtio/virtio_mmio.c) and
in the spec (see Appendix X). And actually the control registers layout
I used was originally based on the PCI "legacy" headers (slightly
simplified), but evolved a bit since. My understanding is that the
changes Michael is proposing affect the PCI device interface only so
they shouldn't affect "my" interface.
By the way, I vaguely remember Peter mentioning that he got the PCI
device "experimentally" running some time ago on one of the PCI-enabled
ARM platform models (realview or versatile)...
Cheers!
Pawel
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Michael S. Tsirkin @ 2011-11-09 10:49 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, penberg, avi, Amit Shah
In-Reply-To: <1320834368.31056.31.camel@lappy>
On Wed, Nov 09, 2011 at 12:26:08PM +0200, Sasha Levin wrote:
> On Wed, 2011-11-09 at 12:13 +0200, Michael S. Tsirkin wrote:
> > On Wed, Nov 09, 2011 at 10:46:06AM +0200, Sasha Levin wrote:
> > > The device initialization sequence might use an update as well.
> >
> > What is needed? Add an item where the driver scans the PCI capability
> > list to detect the layout?
>
> Yup, something similar like that - just to make it obvious.
>
> > > Maybe
> > > also a description of how device handles missing structure IDs.
> > >
> > > [snip]
> >
> > Hmm. I just have
> > 'Drivers should fall back on this legacy structure if a
> > Virtio Structure capability is missing in the PCI capability
> > list'.
> >
> > What else would be helpful? An example?
>
> I just remembered from your patch that you could define some structure
> IDs, but not necessarily all of them, if it's not longer the case then
> ignore me. If it is, then the scenario of a missing structure should be
> specified (For example, if the ISR structure wasn't defined, fall back
> to...).
Yes, this was the intent of the text above. I'll make that explicit.
> > > I'm not sure what capability length is, can't find it in the spec
> > > either.
> > >
> > > [snip]
> >
> > It's the legth of the vendor specific capability structure in bytes.
> > 'the byte immediately following the “Next”
> > pointer in the capability structure is defined to be a length field'
> > It's on page 330 in my copy.
>
> Right, I was looking only at the regular cap definition.
>
> --
>
> Sasha.
_______________________________________________
Virtualization mailing list
Virtualization@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/virtualization
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 10:55 UTC (permalink / raw)
To: Pawel Moll
Cc: Krishna Kumar, Wang Sheng-Hui, kvm@vger.kernel.org,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List,
virtualization@lists.linux-foundation.org, Christian Borntraeger,
avi@redhat.com, Amit Shah
In-Reply-To: <1320835653.3259.138.camel@hornet.cambridge.arm.com>
On Wed, 2011-11-09 at 10:47 +0000, Pawel Moll wrote:
> On Wed, 2011-11-09 at 10:20 +0000, Sasha Levin wrote:
> > > > I'm also wondering it it's ok to move virtio configuration out of virtio
> > > > space and into PCI space for archs that don't have PCI (such as ARM).
>
> Just a note - ARM-based chips can by all means have PCI (grep -r PCI
> arch/arm/ ;-). The fact is that most of the SOCs available on the market
> don't have it, but this is slowly changing.
>
> The main architectural difference is that ARM doesn't provide separate
> I/O space so the PCI I/O space is usually remapped somewhere into normal
> address space (grep -r "#define __io_address" arch/arm/)
>
> > > > Would it mean they get stuck with legacy configuration (and no new
> > > > features)? Or is there an alternative for them?
> > >
> > > The change only affects the layout of virtio PCI. Arches that don't
> > > have PCI don't use virtio PCI, presumably?
> > >
> > > BTW, the spec only covers x86 ATM, this needs to be fixed.
> >
> > From what I see there is a WIP by Pawel Moll <pawel.moll@arm.com> to add
> > virtio platform drivers which get virtio working on ARM for example, and
> > by Peter Maydell <peter.maydell@linaro.org> to modify the spec to
> > support MMIO access (besides PCI).
>
> Yep, it's actually already in 3.2-rc1 (drivers/virtio/virtio_mmio.c) and
> in the spec (see Appendix X). And actually the control registers layout
> I used was originally based on the PCI "legacy" headers (slightly
> simplified), but evolved a bit since. My understanding is that the
> changes Michael is proposing affect the PCI device interface only so
> they shouldn't affect "my" interface.
I didn't know it's in already, might be interesting adding support to it
to x86 userspace tools.
I thought you used the 'legacy' layout, which is why I was worried that
these changed might cause problems for you - but from what I see you
have a different layout there, so as you said, it shouldn't cause any
issues there.
>
> By the way, I vaguely remember Peter mentioning that he got the PCI
> device "experimentally" running some time ago on one of the PCI-enabled
> ARM platform models (realview or versatile)...
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Pawel Moll @ 2011-11-09 11:06 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, Peter Maydell, Wang Sheng-Hui, kvm@vger.kernel.org,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List,
virtualization@lists.linux-foundation.org, Christian Borntraeger,
avi@redhat.com, Amit Shah
In-Reply-To: <1320836144.31056.35.camel@lappy>
On Wed, 2011-11-09 at 10:55 +0000, Sasha Levin wrote:
> On Wed, 2011-11-09 at 10:47 +0000, Pawel Moll wrote:
> > Yep, it's actually already in 3.2-rc1 (drivers/virtio/virtio_mmio.c) and
> > in the spec (see Appendix X). And actually the control registers layout
> > I used was originally based on the PCI "legacy" headers (slightly
> > simplified), but evolved a bit since. My understanding is that the
> > changes Michael is proposing affect the PCI device interface only so
> > they shouldn't affect "my" interface.
>
> I didn't know it's in already, might be interesting adding support to it
> to x86 userspace tools.
Do you mean the qemu or the (non-qemu) KVM tools I know nothing
about? ;-)
If qemu, Peter got it already running with virtio_mmio on ARM models
(not upstream yet as far as I know), but I presume the code would we
mostly non-ARM specific.
Cheers!
Pawel
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Peter Maydell @ 2011-11-09 11:39 UTC (permalink / raw)
To: Pawel Moll
Cc: Krishna Kumar, Wang Sheng-Hui, kvm@vger.kernel.org,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List,
virtualization@lists.linux-foundation.org, Christian Borntraeger,
Sasha Levin, Amit Shah, avi@redhat.com
In-Reply-To: <1320836793.3259.151.camel@hornet.cambridge.arm.com>
On 9 November 2011 11:06, Pawel Moll <pawel.moll@arm.com> wrote:
> On Wed, 2011-11-09 at 10:55 +0000, Sasha Levin wrote:
>> On Wed, 2011-11-09 at 10:47 +0000, Pawel Moll wrote:
>> > Yep, it's actually already in 3.2-rc1 (drivers/virtio/virtio_mmio.c) and
>> > in the spec (see Appendix X). And actually the control registers layout
>> > I used was originally based on the PCI "legacy" headers (slightly
>> > simplified), but evolved a bit since. My understanding is that the
>> > changes Michael is proposing affect the PCI device interface only so
>> > they shouldn't affect "my" interface.
>>
>> I didn't know it's in already, might be interesting adding support to it
>> to x86 userspace tools.
>
> Do you mean the qemu or the (non-qemu) KVM tools I know nothing
> about? ;-)
>
> If qemu, Peter got it already running with virtio_mmio on ARM models
> (not upstream yet as far as I know), but I presume the code would we
> mostly non-ARM specific.
The QEMU code is completely non-ARM-specific (apart from the line
in the relevant ARM board models where we instantiate the devices).
I haven't submitted it upstream yet though because really the
virtio transport layer in QEMU needs to be refactored as a qdev
bus first.
-- PMM
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 12:07 UTC (permalink / raw)
To: Pawel Moll
Cc: Krishna Kumar, Peter Maydell, Wang Sheng-Hui, kvm@vger.kernel.org,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List,
virtualization@lists.linux-foundation.org, Christian Borntraeger,
avi@redhat.com, Amit Shah
In-Reply-To: <1320836793.3259.151.camel@hornet.cambridge.arm.com>
On Wed, 2011-11-09 at 11:06 +0000, Pawel Moll wrote:
> On Wed, 2011-11-09 at 10:55 +0000, Sasha Levin wrote:
> > On Wed, 2011-11-09 at 10:47 +0000, Pawel Moll wrote:
> > > Yep, it's actually already in 3.2-rc1 (drivers/virtio/virtio_mmio.c) and
> > > in the spec (see Appendix X). And actually the control registers layout
> > > I used was originally based on the PCI "legacy" headers (slightly
> > > simplified), but evolved a bit since. My understanding is that the
> > > changes Michael is proposing affect the PCI device interface only so
> > > they shouldn't affect "my" interface.
> >
> > I didn't know it's in already, might be interesting adding support to it
> > to x86 userspace tools.
>
> Do you mean the qemu or the (non-qemu) KVM tools I know nothing
> about? ;-)
I'll get you in the loop when we add virtio-mmio :)
>
> If qemu, Peter got it already running with virtio_mmio on ARM models
> (not upstream yet as far as I know), but I presume the code would we
> mostly non-ARM specific.
>
> Cheers!
>
> Pawel
>
>
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Pekka Enberg @ 2011-11-09 12:25 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Krishna Kumar, kvm, Pawel Moll, Wang Sheng-Hui,
Alexey Kardashevskiy, lkml - Kernel Mailing List, virtualization,
Christian Borntraeger, penberg, Sasha Levin, Amit Shah, avi
In-Reply-To: <20111109101318.GB20612@redhat.com>
On Wed, 9 Nov 2011, Michael S. Tsirkin wrote:
>> KVM tool actually has support for 64bit features, we can probably remove
>> that when Pekka isn't looking :)
>
> It's not yet released so maybe it's not an issue yet.
> If it's too late I can re-add them to legacy too.
>
> Pekka, 64 features aren't yet used and we are discussing
> changing the layout for that field. Mind taking it out
> of kvm tool for now?
Sasha, why did we add 64-bit features to the KVM tool? Wasn't it part of
the virtio spec? Does QEMU not use them? How badly will older versions of
the KVM tool break if you drop 64-bit features?
Pekka
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Sasha Levin @ 2011-11-09 12:28 UTC (permalink / raw)
To: Pekka Enberg
Cc: Krishna Kumar, Wang Sheng-Hui, kvm, Pawel Moll,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List, virtualization, Christian Borntraeger,
penberg, avi, Amit Shah
In-Reply-To: <alpine.LFD.2.02.1111091421570.4936@tux.localdomain>
On Wed, 2011-11-09 at 14:25 +0200, Pekka Enberg wrote:
> On Wed, 9 Nov 2011, Michael S. Tsirkin wrote:
> >> KVM tool actually has support for 64bit features, we can probably remove
> >> that when Pekka isn't looking :)
> >
> > It's not yet released so maybe it's not an issue yet.
> > If it's too late I can re-add them to legacy too.
> >
> > Pekka, 64 features aren't yet used and we are discussing
> > changing the layout for that field. Mind taking it out
> > of kvm tool for now?
>
> Sasha, why did we add 64-bit features to the KVM tool? Wasn't it part of
> the virtio spec? Does QEMU not use them? How badly will older versions of
> the KVM tool break if you drop 64-bit features?
We added 64-bit features to the tool because it just got into the spec
when we rewrote our virtio-pci handling - so we just implemented the
updated spec.
QEMU doesn't use them since while it did get into the spec, it was
intended to future-proof the limited feature bits, so no one really
needed them yet.
They don't exist in kernel code either, for same reason as above.
Nothing will break if we remove it since no one really used it, we were
probably the first and only implementation of the spec which considered
them :)
--
Sasha.
^ permalink raw reply
* Re: [PATCH RFC] virtio-spec: flexible configuration layout
From: Pekka Enberg @ 2011-11-09 12:36 UTC (permalink / raw)
To: Sasha Levin
Cc: Krishna Kumar, Wang Sheng-Hui, kvm, Pawel Moll,
Michael S. Tsirkin, Alexey Kardashevskiy,
lkml - Kernel Mailing List, virtualization, Christian Borntraeger,
penberg, avi, Amit Shah
In-Reply-To: <1320841683.31056.41.camel@lappy>
On Wed, 9 Nov 2011, Sasha Levin wrote:
> They don't exist in kernel code either, for same reason as above.
>
> Nothing will break if we remove it since no one really used it, we were
> probably the first and only implementation of the spec which considered
> them :)
As long as we are able to run older versions of the KVM tool with newer
kernels and vice versa, I see no reason why we can't drop 64-bit features
from the KVM tool.
Pekka
^ permalink raw reply
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