From mboxrd@z Thu Jan 1 00:00:00 1970 From: Wei Wang Subject: [PATCH 10 of 16] amd iommu: Enable FC bit in iommu host level PTE Date: Wed, 14 Dec 2011 16:29:31 +0100 Message-ID: <001681ff1a0c09c4d04f.1323876571@gran.amd.com> References: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: JBeulich@suse.com, keir@xen.org Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org # HG changeset patch # User Wei Wang # Date 1323875775 -3600 # Node ID 001681ff1a0c09c4d04fd8bd45e8d26805686246 # Parent f33af4d61321d074a4c624d909204fce5945f61b amd iommu: Enable FC bit in iommu host level PTE Signed-off-by: Wei Wang diff -r f33af4d61321 -r 001681ff1a0c xen/drivers/passthrough/amd/iommu_map.c --- a/xen/drivers/passthrough/amd/iommu_map.c Wed Dec 14 16:16:14 2011 +0100 +++ b/xen/drivers/passthrough/amd/iommu_map.c Wed Dec 14 16:16:15 2011 +0100 @@ -83,6 +83,11 @@ static bool_t set_iommu_pde_present(u32 set_field_in_reg_u32(ir, entry, IOMMU_PDE_IO_READ_PERMISSION_MASK, IOMMU_PDE_IO_READ_PERMISSION_SHIFT, &entry); + + /* IOMMUv2 needs FC bit enabled */ + if ( next_level == IOMMU_PAGING_MODE_LEVEL_0 ) + set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, entry, + IOMMU_PTE_FC_MASK, IOMMU_PTE_FC_SHIFT, &entry); pde[1] = entry; /* mark next level as 'present' */