From: Andre Przywara <andre.przywara@linaro.org>
To: Julien Grall <julien.grall@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>,
xen-devel@lists.xenproject.org
Subject: Re: [RFC PATCH 08/49] ARM: VGIC: move max_vcpus VGIC limit to struct arch_domain
Date: Wed, 28 Feb 2018 12:32:50 +0000 [thread overview]
Message-ID: <0adb48e4-129b-8980-c0c2-8b1666fd8227@linaro.org> (raw)
In-Reply-To: <e98f34ab-08e1-7407-05de-a0fd81a299dd@arm.com>
Hi,
On 09/02/18 19:27, Julien Grall wrote:
> Hi,
>
> On 02/09/2018 02:38 PM, Andre Przywara wrote:
>> The VGIC model used for a domain (GICv2 or GICv3) determines the maximum
>> number of VCPUs for that guest, as GICv2 can only handle 8 processors.
>> In the moment we carry this per-VGIC-model limit in the vgic_ops,
>> alongside the model specific functions. That makes some sense, but
>> exposes some current VGIC implementation details to generic Xen code.
>> Add a new arch specific field in our domain structure to hold this
>> vcpu limit,
>> and initialize it when we set the ops. This allows us to plug in the new
>> VGIC later without also needing to carry some ops structure.
>>
>> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
>> ---
>> xen/arch/arm/domain.c | 5 ++---
>> xen/arch/arm/vgic.c | 3 ++-
>> xen/include/asm-arm/domain.h | 1 +
>> 3 files changed, 5 insertions(+), 4 deletions(-)
>>
>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
>> index a010443bfd..9ad4cd0a6e 100644
>> --- a/xen/arch/arm/domain.c
>> +++ b/xen/arch/arm/domain.c
>> @@ -975,11 +975,10 @@ unsigned int domain_max_vcpus(const struct
>> domain *d)
>> * allocation when the vgic_ops haven't been initialised yet,
>> * we return MAX_VIRT_CPUS if d->arch.vgic.handler is null.
>> */
>> - if ( !d->arch.vgic.handler )
>> + if ( !d->arch.max_vcpus )
>> return MAX_VIRT_CPUS;
>> else
>> - return min_t(unsigned int, MAX_VIRT_CPUS,
>> - d->arch.vgic.handler->max_vcpus);
>> + return d->arch.max_vcpus;
>> }
>> /*
>> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
>> index 9921769b15..5f47aa84a9 100644
>> --- a/xen/arch/arm/vgic.c
>> +++ b/xen/arch/arm/vgic.c
>> @@ -166,7 +166,8 @@ int domain_vgic_init(struct domain *d, unsigned
>> int nr_spis)
>> void register_vgic_ops(struct domain *d, const struct vgic_ops *ops)
>> {
>> - d->arch.vgic.handler = ops;
>> + d->arch.vgic.handler = ops;
>> + d->arch.max_vcpus = ops->max_vcpus;
>> }
>> void domain_vgic_free(struct domain *d)
>> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
>> index 1dd9683d25..2fef32eaee 100644
>> --- a/xen/include/asm-arm/domain.h
>> +++ b/xen/include/asm-arm/domain.h
>> @@ -149,6 +149,7 @@ struct arch_domain
>> #ifdef CONFIG_SBSA_VUART_CONSOLE
>> struct vpl011 vpl011;
>> #endif
>> + unsigned int max_vcpus;
>
> Now, you have max_vcpus defined in both arch_domain and domain. Which
> makes the code very confusing to read. This is becoming apparent in the
> check if (d->arch.max_vcpus > d->max_vcpus).
True, though I was just copying the name from the vgic_ops ;-)
I could suggest arch.vgic_vcpu_limit instead, but...
> If you plan to ditch the ops, then I would prefer a check on the vGIC
> version. Even if it means carrying vGIC specific implementation in
> generic Xen code.
So what about just providing per-VGIC implementations of
domain_max_vcpus()? That seems to be the only user of this information,
AFAICS? So I move this from xen/arch/arm/domain.c to
xen/arch/arm{/vgic,}/vgic.c, where we can do all kind of internal VGIC
tricks to learn this bit of information.
> This would also avoid to grow the struct domain just for a "constant
> field" used mostly at guest creation.
"Here’s a nickel, kid. Get yourself some memory." ;-)
Cheers,
Andre.
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next prev parent reply other threads:[~2018-02-28 12:33 UTC|newest]
Thread overview: 154+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-09 14:38 [RFC PATCH 00/49] New VGIC(-v2) implementation Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 01/49] tools: ARM: vGICv3: avoid inserting optional DT properties Andre Przywara
2018-02-09 19:14 ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 02/49] ARM: vGICv3: drop GUEST_GICV3_RDIST_REGIONS symbol Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 03/49] ARM: GICv3: use hardware GICv3 redistributor regions for Dom0 Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 04/49] ARM: GICv3: simplify GICv3 redistributor stride handling Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 05/49] ARM: vGICv3: always use architected redist stride Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 06/49] ARM: vGICv3: remove rdist_stride from VGIC structure Andre Przywara
2018-02-09 14:38 ` [RFC PATCH 07/49] ARM: VGIC: move gic_remove_from_lr_pending() prototype Andre Przywara
2018-02-09 19:15 ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 08/49] ARM: VGIC: move max_vcpus VGIC limit to struct arch_domain Andre Przywara
2018-02-09 19:27 ` Julien Grall
2018-02-28 12:32 ` Andre Przywara [this message]
2018-02-28 13:04 ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 09/49] ARM: VGIC: change to level-IRQ compatible IRQ injection interface Andre Przywara
2018-02-12 11:15 ` Julien Grall
2018-02-12 11:59 ` Andre Przywara
2018-02-12 12:19 ` Julien Grall
2018-02-12 14:24 ` Andre Przywara
2018-02-13 11:49 ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 10/49] ARM: VGIC: carve out struct vgic_cpu and struct vgic_dist Andre Przywara
2018-02-12 11:19 ` Julien Grall
2018-02-09 14:38 ` [RFC PATCH 11/49] ARM: VGIC: reorder prototypes in vgic.h Andre Przywara
2018-02-12 11:53 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 12/49] ARM: VGIC: introduce gic_get_nr_lrs() Andre Przywara
2018-02-12 11:57 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 13/49] ARM: VGIC: Add hypervisor base address to vgic_v2_setup_hw() Andre Przywara
2018-02-12 12:07 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 14/49] ARM: VGIC: extend GIC CPU interface definitions Andre Przywara
2018-02-12 12:34 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 15/49] ARM: GIC: Allow tweaking the active state of an IRQ Andre Przywara
2018-02-12 13:55 ` Julien Grall
2018-02-12 17:53 ` Andre Przywara
2018-02-13 12:02 ` Julien Grall
2018-02-13 15:01 ` Andre Przywara
2018-02-16 15:07 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 16/49] ARM: GIC: allow reading pending state of a hardware IRQ Andre Przywara
2018-02-12 14:00 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 17/49] ARM: timer: Handle level triggered IRQs correctly Andre Przywara
2018-02-12 15:19 ` Julien Grall
2018-02-12 18:23 ` Andre Przywara
2018-02-13 12:05 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 18/49] ARM: evtchn: " Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 19/49] ARM: vPL011: Use the VGIC's level triggered IRQs handling if available Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 20/49] ARM: new VGIC: Add data structure definitions Andre Przywara
2018-02-12 16:42 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 21/49] ARM: new VGIC: Add acccessor to new struct vgic_irq instance Andre Przywara
2018-02-12 17:42 ` Julien Grall
2018-02-13 11:18 ` Andre Przywara
2018-02-16 15:16 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 22/49] ARM: new VGIC: Implement virtual IRQ injection Andre Przywara
2018-02-12 18:59 ` Julien Grall
2018-02-27 10:17 ` Andre Przywara
2018-02-27 10:43 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 23/49] ARM: new VGIC: Add IRQ sorting Andre Przywara
2018-02-13 12:30 ` Julien Grall
2018-02-13 14:56 ` Andre Przywara
2018-02-13 15:00 ` Julien Grall
2018-02-13 16:21 ` Christoffer Dall
2018-02-09 14:39 ` [RFC PATCH 24/49] ARM: new VGIC: Add IRQ sync/flush framework Andre Przywara
2018-02-13 12:41 ` Julien Grall
2018-02-13 15:40 ` Andre Przywara
2018-02-16 15:22 ` Julien Grall
2018-02-13 14:31 ` Julien Grall
2018-02-13 14:56 ` Andre Przywara
2018-02-13 15:01 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 25/49] ARM: new VGIC: Add GICv2 world switch backend Andre Przywara
2018-02-13 14:31 ` Julien Grall
2018-02-26 15:13 ` Andre Przywara
2018-02-26 16:02 ` Julien Grall
2018-02-26 16:19 ` Andre Przywara
2018-02-26 15:16 ` Andre Przywara
2018-02-26 15:59 ` Julien Grall
2018-02-26 16:23 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 26/49] ARM: new VGIC: Implement vgic_vcpu_pending_irq Andre Przywara
2018-02-13 16:35 ` Julien Grall
2018-02-13 16:36 ` Julien Grall
2018-02-26 15:29 ` Andre Przywara
2018-02-26 15:55 ` Julien Grall
2018-02-26 16:25 ` Andre Przywara
2018-02-26 16:30 ` Julien Grall
2018-03-02 13:53 ` Andre Przywara
2018-03-02 13:58 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 27/49] ARM: new VGIC: Add MMIO handling framework Andre Przywara
2018-02-13 16:52 ` Julien Grall
2018-02-13 18:17 ` Andre Przywara
2018-02-16 15:25 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 28/49] ARM: new VGIC: Add GICv2 " Andre Przywara
2018-02-16 15:39 ` Julien Grall
2018-02-19 12:23 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 29/49] ARM: new VGIC: Add CTLR, TYPER and IIDR handlers Andre Przywara
2018-02-16 15:56 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 30/49] ARM: new VGIC: Add ENABLE registers handlers Andre Przywara
2018-02-16 16:57 ` Julien Grall
2018-02-19 12:41 ` Andre Przywara
2018-02-19 14:13 ` Julien Grall
2018-02-27 13:54 ` Andre Przywara
2018-02-27 14:34 ` Julien Grall
2018-02-23 15:18 ` Andre Przywara
2018-02-26 11:20 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 31/49] ARM: new VGIC: Add PENDING " Andre Przywara
2018-02-16 17:16 ` Julien Grall
2018-02-19 15:32 ` Andre Przywara
2018-02-19 15:43 ` Julien Grall
2018-03-02 16:36 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 32/49] ARM: new VGIC: Add ACTIVE " Andre Przywara
2018-02-16 17:30 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 33/49] ARM: new VGIC: Add PRIORITY " Andre Przywara
2018-02-16 17:38 ` Julien Grall
2018-02-23 14:47 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 34/49] ARM: new VGIC: Add CONFIG " Andre Przywara
2018-02-19 11:39 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 35/49] ARM: new VGIC: Add TARGET " Andre Przywara
2018-02-19 11:53 ` Julien Grall
2018-02-23 11:25 ` Andre Przywara
2018-02-19 12:30 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 36/49] ARM: new VGIC: Add SGIR register handler Andre Przywara
2018-02-19 11:59 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 37/49] ARM: new VGIC: Add SGIPENDR register handlers Andre Przywara
2018-02-19 12:02 ` Julien Grall
2018-02-23 11:39 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 38/49] ARM: new VGIC: handle hardware mapped IRQs Andre Przywara
2018-02-19 12:19 ` Julien Grall
2018-02-23 18:02 ` Andre Przywara
2018-02-23 18:14 ` Julien Grall
2018-02-26 16:48 ` Andre Przywara
2018-02-26 16:57 ` Julien Grall
2018-02-26 17:19 ` Andre Przywara
2018-02-26 17:26 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 39/49] ARM: new VGIC: Add event channel IRQ handling Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 40/49] ARM: new VGIC: Handle virtual IRQ allocation/reservation Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 41/49] ARM: new VGIC: dump virtual IRQ info Andre Przywara
2018-02-19 12:26 ` Julien Grall
2018-02-26 16:58 ` Andre Przywara
2018-02-26 17:01 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 42/49] ARM: new VGIC: provide system register emulation stub Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 43/49] ARM: new VGIC: Add preliminary stub implementations Andre Przywara
2018-02-19 12:34 ` Julien Grall
2018-02-27 17:05 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 44/49] ARM: new VGIC: vgic-init: register VGIC Andre Przywara
2018-02-19 12:39 ` Julien Grall
2018-02-26 17:33 ` Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 45/49] ARM: new VGIC: vgic-init: implement vgic_init Andre Przywara
2018-02-19 13:21 ` Julien Grall
2018-02-19 15:53 ` Andre Przywara
2018-02-19 15:58 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 46/49] ARM: new VGIC: vgic-init: implement map_resources Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 47/49] ARM: new VGIC: Add vgic_v2_enable Andre Przywara
2018-02-09 14:39 ` [RFC PATCH 48/49] ARM: allocate two pages for struct vcpu Andre Przywara
2018-02-19 14:07 ` Julien Grall
2018-02-09 14:39 ` [RFC PATCH 49/49] ARM: VGIC: wire new VGIC(-v2) files into Xen build system Andre Przywara
2018-02-09 15:06 ` [RFC PATCH 00/49] New VGIC(-v2) implementation Andre Przywara
2018-02-12 11:48 ` Julien Grall
2018-02-12 11:53 ` Andre Przywara
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