Re: AMD IOMMU intremap tables and IOAPICs

[George Dunlap <george.dunlap@citrix.com>]

On Tue, 2011-09-06 at 17:03 +0100, Andrew Cooper wrote:
> On 06/09/11 16:57, George Dunlap wrote:
> > On Tue, Sep 6, 2011 at 4:54 PM, Andrew Cooper <andrew.cooper3@citrix.com> wrote:
> >> On 06/09/11 16:47, George Dunlap wrote:
> >>> Wei,
> >>>
> >>> Quick question:  Am I reading the code correctly, that even with
> >>> per-device interrupt remap tables, that GSIs are accounted to the
> >>> intremap table of the corresponding IOAPIC, presumably because the
> >>> IOMMU sees interrupts generated as GSIs as coming from the IOAPIC?  In
> >>> that case, then we need all devices sharing the same IOAPIC must not
> >>> have any vector collisions.  Is that correct?
> >> Based on the ICH10 IO-APIC documentation with respect to auto EOIs, we
> >> cant have any two IRQs across any IO-APICs sharing a vector,
> >> irrespective of IOMMU or not.  (Because the EOI'ing an IO-APIC entry
> >> only takes account of vector and not destination)
> >>
> >> If we were to disable the auto EOI broadcast and do manual EOI'ing (only
> >> available on newer versions of the local apic) then we could reduce that
> >> restriction to "no two IRQs in the same IO-APIC may share a vector".
> > Hmm, so it sounds like enforcing non-sharing of vectors within a
> > single IOAPIC is something we probably want to do even when we're not
> > using an AMD IOMMU?
> >
> >  -George
> 
> Currently there is no code to disable auto EOI and do manual EOI
> instead.  As a result, we should enforce non-sharing of vectors across
> all IO-APICs.  It was on my irq cleanup list but seems to be a specific
> problem for you at the moment.

My problem doesn't have anything to do with EOIs, but with the AMD IOMMU
interrupt remapping table, and a device driver which simply dies if it
misses any interrupts.  If we can kill two birds with one stone, all the
better.

 -George