[PATCH] intel gpu passthrough: Expose vendor specific pci cap on host bridge.

[Jean Guyader <jean.guyader@eu.citrix.com>]

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Some versions of the Windows Intel GPU driver expect the vendor
PCI capability to be there on the host bridge config space when
passing through a Intel GPU.

Signed-off-by: Jean Guyader <jean.guyader@eu.citrix.com>
---
 hw/pt-graphics.c |   51 ++++++++++++++++++++++++++++++++++++++++++++++-----
 1 files changed, 46 insertions(+), 5 deletions(-)


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diff --git a/hw/pt-graphics.c b/hw/pt-graphics.c
index fec7390..1120639 100644
--- a/hw/pt-graphics.c
+++ b/hw/pt-graphics.c
@@ -60,6 +60,44 @@ void igd_pci_write(PCIDevice *pci_dev, uint32_t config_addr, uint32_t val, int l
     }
 }
 
+#define PCI_INTEL_VENDOR_CAP            0x34
+#define PCI_INTEL_VENDOR_CAP_TYPE       0x09
+static uint32_t igd_pci_read_vendor_cap(PCIDevice *pci_dev, uint32_t config_addr, int len,
+                                        uint32_t val)
+{
+    struct pci_dev *pci_dev_host_bridge = pt_pci_get_dev(0, 0, 0);
+    uint32_t vendor_cap = 0;
+    uint32_t cap_type = 0;
+    uint32_t cap_size = 0;
+
+    vendor_cap = pt_pci_host_read(pci_dev_host_bridge, PCI_INTEL_VENDOR_CAP, 1);
+    if (config_addr == PCI_INTEL_VENDOR_CAP)
+    {
+        /* Only do the following for vendor specific caps (0x09) */
+        if (cap_type != PCI_INTEL_VENDOR_CAP_TYPE)
+            return 0;
+
+        if (vendor_cap == 0)
+            return 0;
+    }
+
+    cap_type = pt_pci_host_read(pci_dev_host_bridge, vendor_cap, 1);
+    cap_size = pt_pci_host_read(pci_dev_host_bridge, vendor_cap + 2, 1);
+
+    /* Remove the next capability link */
+    if (config_addr == vendor_cap + 1)
+        return 0;
+
+    if (config_addr >= vendor_cap &&
+            config_addr + len < vendor_cap + cap_size)
+    {
+        return pt_pci_host_read(pci_dev_host_bridge, config_addr, len);
+    }
+
+    /* -1, this function doesn't deal with this config space offset */
+    return -1;
+}
+
 uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len)
 {
     struct pci_dev *pci_dev_host_bridge = pt_pci_get_dev(0, 0, 0);
@@ -82,14 +120,17 @@ uint32_t igd_pci_read(PCIDevice *pci_dev, uint32_t config_addr, int len)
         case 0xa4:        /* SNB: graphics base of stolen memory */
         case 0xa8:        /* SNB: base of GTT stolen memory */
             val = pt_pci_host_read(pci_dev_host_bridge, config_addr, len);
-#ifdef PT_DEBUG_PCI_CONFIG_ACCESS
-            PT_LOG_DEV(pci_dev, "addr=%x len=%x val=%x\n",
-                    config_addr, len, val);
-#endif
             break;
         default:
-            val = pci_default_read_config(pci_dev, config_addr, len);
+            val = igd_pci_read_vendor_cap(pci_dev, config_addr, len, val);
+            if (val == -1)
+                val = pci_default_read_config(pci_dev, config_addr, len);
+
     }
+#ifdef PT_DEBUG_PCI_CONFIG_ACCESS
+    PT_LOG_DEV(pci_dev, "addr=%x len=%x val=%x\n",
+            config_addr, len, val);
+#endif
     return val;
 }
 

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