From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ian Campbell Subject: [PATCH 14/21] arm: move PSR flag definitions into interface, for tools use. Date: Thu, 28 Jun 2012 14:48:02 +0000 Message-ID: <1340894890-4369-14-git-send-email-ian.campbell@citrix.com> References: <1340894870.10942.63.camel@zakaz.uk.xensource.com> <1340894890-4369-1-git-send-email-ian.campbell@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1340894890-4369-1-git-send-email-ian.campbell@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: Ian Campbell List-Id: xen-devel@lists.xenproject.org Signed-off-by: Ian Campbell Acked-by: Tim Deegan --- xen/arch/arm/entry.S | 1 + xen/include/asm-arm/page.h | 2 ++ xen/include/asm-arm/processor.h | 21 --------------------- xen/include/asm-arm/system.h | 2 +- xen/include/public/arch-arm.h | 23 ++++++++++++++++++++++- 5 files changed, 26 insertions(+), 23 deletions(-) diff --git a/xen/arch/arm/entry.S b/xen/arch/arm/entry.S index 5bc3906..2ff32a1 100644 --- a/xen/arch/arm/entry.S +++ b/xen/arch/arm/entry.S @@ -1,5 +1,6 @@ #include #include +#include #define SAVE_ONE_BANKED(reg) mrs r11, reg; str r11, [sp, #UREGS_##reg] #define RESTORE_ONE_BANKED(reg) ldr r11, [sp, #UREGS_##reg]; msr reg, r11 diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index 2b6c1780..f3e4d1a 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -2,6 +2,8 @@ #define __ARM_PAGE_H__ #include +#include +#include #define PADDR_BITS 40 #define PADDR_MASK ((1ULL << PADDR_BITS)-1) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 9b3c9dd..3849b23 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -3,27 +3,6 @@ #include -/* PSR bits (CPSR, SPSR)*/ - -/* 0-4: Mode */ -#define PSR_MODE_MASK 0x1f -#define PSR_MODE_USR 0x10 -#define PSR_MODE_FIQ 0x11 -#define PSR_MODE_IRQ 0x12 -#define PSR_MODE_SVC 0x13 -#define PSR_MODE_MON 0x16 -#define PSR_MODE_ABT 0x17 -#define PSR_MODE_HYP 0x1a -#define PSR_MODE_UND 0x1b -#define PSR_MODE_SYS 0x1f - -#define PSR_THUMB (1<<5) /* Thumb Mode enable */ -#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ -#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ -#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ -#define PSR_BIG_ENDIAN (1<<9) /* Big Endian Mode */ -#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ - /* TTBCR Translation Table Base Control Register */ #define TTBCR_EAE 0x80000000 #define TTBCR_N_MASK 0x07 diff --git a/xen/include/asm-arm/system.h b/xen/include/asm-arm/system.h index 7963ea5..216ef1f 100644 --- a/xen/include/asm-arm/system.h +++ b/xen/include/asm-arm/system.h @@ -3,7 +3,7 @@ #define __ASM_SYSTEM_H #include -#include +#include #define nop() \ asm volatile ( "nop" ) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index e915cbf..eb1add9 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -138,7 +138,28 @@ struct arch_shared_info { }; typedef struct arch_shared_info arch_shared_info_t; typedef uint64_t xen_callback_t; -#endif +#endif /* ifndef __ASSEMBLY __ */ + +/* PSR bits (CPSR, SPSR)*/ + +/* 0-4: Mode */ +#define PSR_MODE_MASK 0x1f +#define PSR_MODE_USR 0x10 +#define PSR_MODE_FIQ 0x11 +#define PSR_MODE_IRQ 0x12 +#define PSR_MODE_SVC 0x13 +#define PSR_MODE_MON 0x16 +#define PSR_MODE_ABT 0x17 +#define PSR_MODE_HYP 0x1a +#define PSR_MODE_UND 0x1b +#define PSR_MODE_SYS 0x1f + +#define PSR_THUMB (1<<5) /* Thumb Mode enable */ +#define PSR_FIQ_MASK (1<<6) /* Fast Interrupt mask */ +#define PSR_IRQ_MASK (1<<7) /* Interrupt mask */ +#define PSR_ABT_MASK (1<<8) /* Asynchronous Abort mask */ +#define PSR_BIG_ENDIAN (1<<9) /* Big Endian Mode */ +#define PSR_JAZELLE (1<<24) /* Jazelle Mode */ #endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ -- 1.7.9.1