From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: Ian Campbell <ian.campbell@citrix.com>
Subject: [PATCH 05/21] arm: split pending SPIs (global) out from pending PPIs and SGIs (per CPU)
Date: Thu, 28 Jun 2012 14:47:53 +0000 [thread overview]
Message-ID: <1340894890-4369-5-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1340894890-4369-1-git-send-email-ian.campbell@citrix.com>
This tracks SPIs in struct arch_domain and PPIs+SGIs in struct arch_vcpu which
seems more logical.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
---
xen/arch/arm/vgic.c | 12 +++++++-----
xen/include/asm-arm/domain.h | 10 ++++++++++
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 629a0da..af3523f 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -82,9 +82,8 @@ int domain_vgic_init(struct domain *d)
d->arch.vgic.shared_irqs =
xmalloc_array(struct vgic_irq_rank, DOMAIN_NR_RANKS(d));
d->arch.vgic.pending_irqs =
- xmalloc_array(struct pending_irq,
- d->arch.vgic.nr_lines + (32 * d->max_vcpus));
- for (i=0; i<d->arch.vgic.nr_lines + (32 * d->max_vcpus); i++)
+ xzalloc_array(struct pending_irq, d->arch.vgic.nr_lines);
+ for (i=0; i<d->arch.vgic.nr_lines; i++)
INIT_LIST_HEAD(&d->arch.vgic.pending_irqs[i].inflight);
for (i=0; i<DOMAIN_NR_RANKS(d); i++)
spin_lock_init(&d->arch.vgic.shared_irqs[i].lock);
@@ -98,6 +97,10 @@ int vcpu_vgic_init(struct vcpu *v)
spin_lock_init(&v->arch.vgic.private_irqs.lock);
+ memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs));
+ for (i = 0; i < 32; i++)
+ INIT_LIST_HEAD(&v->arch.vgic.pending_irqs[i].inflight);
+
/* For SGI and PPI the target is always this CPU */
for ( i = 0 ; i < 8 ; i++ )
v->arch.vgic.private_irqs.itargets[i] =
@@ -535,8 +538,7 @@ struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq)
/* Pending irqs allocation strategy: the first vgic.nr_lines irqs
* are used for SPIs; the rests are used for per cpu irqs */
if ( irq < 32 )
- n = &v->domain->arch.vgic.pending_irqs[irq + (v->vcpu_id * 32)
- + v->domain->arch.vgic.nr_lines];
+ n = &v->arch.vgic.pending_irqs[irq];
else
n = &v->domain->arch.vgic.pending_irqs[irq - 32];
return n;
diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
index 620b26e..32deb52 100644
--- a/xen/include/asm-arm/domain.h
+++ b/xen/include/asm-arm/domain.h
@@ -46,6 +46,10 @@ struct arch_domain
int ctlr;
int nr_lines;
struct vgic_irq_rank *shared_irqs;
+ /*
+ * SPIs are domain global, SGIs and PPIs are per-VCPU and stored in
+ * struct arch_vcpu.
+ */
struct pending_irq *pending_irqs;
} vgic;
@@ -114,7 +118,13 @@ struct arch_vcpu
uint32_t gic_lr[64];
struct {
+ /*
+ * SGIs and PPIs are per-VCPU, SPIs are domain global and in
+ * struct arch_domain.
+ */
+ struct pending_irq pending_irqs[32];
struct vgic_irq_rank private_irqs;
+
/* This list is ordered by IRQ priority and it is used to keep
* track of the IRQs that the VGIC injected into the guest.
* Depending on the availability of LR registers, the IRQs might
--
1.7.9.1
next prev parent reply other threads:[~2012-06-28 14:47 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-28 14:47 [PATCH 0/21 V3] arm: boot a dom1 to "Calibrating delay loop" then hang Ian Campbell
2012-06-28 14:47 ` [PATCH 01/21] arm: allow p2m to be created with specific MATTR Ian Campbell
2012-06-28 14:47 ` [PATCH 02/21] arm: implement vpl011 (UART) emulator Ian Campbell
2012-06-28 14:47 ` [PATCH 03/21] arm: implement vcpu_show_execution_state Ian Campbell
2012-06-28 14:47 ` [PATCH 04/21] arm: use correct attributes for mappings in copy_from_paddr() Ian Campbell
2012-06-28 14:47 ` Ian Campbell [this message]
2012-06-28 14:47 ` [PATCH 06/21] arm: make vgic lock safe for use in interrupt context Ian Campbell
2012-07-02 15:42 ` Stefano Stabellini
2012-06-28 14:47 ` [PATCH 07/21] arm: map GICV in all domains, not just dom0 Ian Campbell
2012-06-28 14:47 ` [PATCH 08/21] arm: enable data-cache at the same time as enabling the MMU, not before Ian Campbell
2012-06-28 14:47 ` [PATCH 09/21] arm: Upgrade guest barriers to Outer-Shareable. Enable Protected Table Walk Ian Campbell
2012-06-28 14:47 ` [PATCH 10/21] arm: gic.lock can be taken in interrupt context, so lock appropriately Ian Campbell
2012-06-28 14:47 ` [PATCH 11/21] arm: context switch virtual timer registers Ian Campbell
2012-06-28 14:48 ` [PATCH 12/21] arm: the hyp timer seems to work in newer model versions, default to using it Ian Campbell
2012-06-28 14:48 ` [PATCH 13/21] arm: unwind allocations etc on arch_domain_create_failure Ian Campbell
2012-06-28 14:48 ` [PATCH 14/21] arm: move PSR flag definitions into interface, for tools use Ian Campbell
2012-06-28 14:48 ` [PATCH 15/21] arm: fix typo s/approprately/appropriately/g Ian Campbell
2012-06-28 14:48 ` [PATCH 16/21] HACK: arm: initial XENMAPSPACE_gmfn_foreign Ian Campbell
2012-06-28 14:48 ` [PATCH 17/21] libxc: add ARM support to xc_dom (PV domain building) Ian Campbell
2012-06-28 14:48 ` [PATCH 18/21] arm: implement VGCF_online Ian Campbell
2012-06-28 14:48 ` [PATCH 19/21] HACK: add simple xcbuild Ian Campbell
2012-06-28 14:48 ` [PATCH 20/21] HACK: arm: disable hypercall continuations Ian Campbell
2012-06-28 14:48 ` [PATCH 21/21] xen: add assertion in default_vcpu0_location to protect against broken masks Ian Campbell
2012-07-03 10:07 ` [PATCH 0/21 V3] arm: boot a dom1 to "Calibrating delay loop" then hang Ian Campbell
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