From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dongxiao Xu Subject: [PATCH 1/3] nested vmx: emulate IA32_VMX_MISC MSR Date: Thu, 27 Dec 2012 14:16:11 +0800 Message-ID: <1356588973-13106-2-git-send-email-dongxiao.xu@intel.com> References: <1356588973-13106-1-git-send-email-dongxiao.xu@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1356588973-13106-1-git-send-email-dongxiao.xu@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org Use the host value to emulate IA32_VMX_MISC MSR for L1 VMM. For CR3-target value, we don't support this feature currently and set the number to zero. Signed-off-by: Dongxiao Xu --- xen/arch/x86/hvm/vmx/vvmx.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 7b27d2d..0a876b0 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1462,7 +1462,8 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) data = 0x267ff & ~X86_CR4_SMXE; break; case MSR_IA32_VMX_MISC: - gdprintk(XENLOG_WARNING, "VMX MSR %x not fully supported yet.\n", msr); + /* Do not support CR3-target feature now */ + data = host_data & ~(0x1ff << 16); break; default: r = 0; -- 1.7.1