[PATCH 0/4] nested vmx: enable VMCS shadowing feature

[Dongxiao Xu <dongxiao.xu@intel.com>]

Latest Intel SDM introduced a new feature "VMCS shadowing" at bit 14 in
Secondary Processor-Based VM-Execution Controls for nested virtualization.

The main purpose of this feature is to reduce or eliminate the number of VM exit
for non-root VMREAD and VMWRITE. It provides the capability to link a
"virtual VMCS" with the current running VMCS, so that after VM entry, the
non-root VMREAD and VMWRITE can get/set related data directly from/to the
"virtual VMCS" without trap and emulation.

A separate bitmap is introduced for VMREAD and VMWRITE, from which hypervisor
can control whether VMREAD/VMWRITE from/to certain VMCS field will trigger
VM exit or directly get/set data by hardware.

With the new feature introduced, all the in "virtual VMCS" need to be operated
by VMREAD and VMWRITE because this VMCS will also be loaded into hardware.
This requires the capability to VMWRITE all the VMCS fields, including those
readonly ones. Intel SDM introduces this functionality at bit 29 in
IA32_VMX_MISC MSR.

For details, please refer to:
http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html

Thanks,
Dongxiao

Dongxiao Xu (4):
  nested vmx: Use a list to store the launched vvmcs for L1 VMM
  nested vmx: use VMREAD/VMWRITE to construct vVMCS if enabled VMCS
    shadowing
  nested vmx: optimize for bulk access of virtual VMCS
  nested vmx: enable VMCS shadowing feature

 xen/arch/x86/hvm/vmx/vmcs.c        |   92 +++++++++++++++-
 xen/arch/x86/hvm/vmx/vvmx.c        |  220 +++++++++++++++++++++++++++++++-----
 xen/include/asm-x86/hvm/vmx/vmcs.h |   23 ++++-
 xen/include/asm-x86/hvm/vmx/vvmx.h |   22 +++-
 4 files changed, 321 insertions(+), 36 deletions(-)