From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: dietmar.hahn@ts.fujitsu.com, suravee.suthikulpanit@amd.com,
jun.nakajima@intel.com, haitao.shan@intel.com,
jacob.shin@amd.com
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>, xen-devel@lists.xen.org
Subject: [PATCH 1/8] x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map
Date: Tue, 9 Apr 2013 13:26:12 -0400 [thread overview]
Message-ID: <1365528379-2516-2-git-send-email-boris.ostrovsky@oracle.com> (raw)
In-Reply-To: <1365528379-2516-1-git-send-email-boris.ostrovsky@oracle.com>
Currently VMCB's MSRPM can be updated to either intercept both reads and
writes to an MSR or not intercept neither. In some cases we may want to
be more selective and intercept one but not the other.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
xen/arch/x86/hvm/svm/svm.c | 15 +++++++--------
xen/include/asm-x86/hvm/svm/vmcb.h | 8 ++++++--
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index f170ffb..8ce37c9 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -137,7 +137,7 @@ svm_msrbit(unsigned long *msr_bitmap, uint32_t msr)
return msr_bit;
}
-void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable)
+void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags)
{
unsigned long *msr_bit;
@@ -145,16 +145,15 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable)
BUG_ON(msr_bit == NULL);
msr &= 0x1fff;
- if ( enable )
- {
- __set_bit(msr * 2, msr_bit);
+ if ( flags & MSR_INTERCEPT_READ )
+ __set_bit(msr * 2, msr_bit);
+ else
+ __clear_bit(msr * 2, msr_bit);
+
+ if ( flags & MSR_INTERCEPT_WRITE )
__set_bit(msr * 2 + 1, msr_bit);
- }
else
- {
- __clear_bit(msr * 2, msr_bit);
__clear_bit(msr * 2 + 1, msr_bit);
- }
}
static void svm_save_dr(struct vcpu *v)
diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h
index b7c0404..ade4bb2 100644
--- a/xen/include/asm-x86/hvm/svm/vmcb.h
+++ b/xen/include/asm-x86/hvm/svm/vmcb.h
@@ -531,9 +531,13 @@ void svm_destroy_vmcb(struct vcpu *v);
void setup_vmcb_dump(void);
+#define MSR_INTERCEPT_NONE 0
+#define MSR_INTERCEPT_READ 1
+#define MSR_INTERCEPT_WRITE 2
+#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ)
void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable);
-#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 0)
-#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 1)
+#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE)
+#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW)
/*
* VMCB accessor functions.
--
1.8.1.2
next prev parent reply other threads:[~2013-04-09 17:26 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-09 17:26 [PATCH 0/8] Various VPMU patches Boris Ostrovsky
2013-04-09 17:26 ` Boris Ostrovsky [this message]
2013-04-09 17:26 ` [PATCH 2/8] x86/AMD: Do not intercept access to performance counters MSRs Boris Ostrovsky
2013-04-10 13:25 ` Jan Beulich
2013-04-09 17:26 ` [PATCH 3/8] x86/AMD: Read VPMU MSRs from context when it is not loaded into HW Boris Ostrovsky
2013-04-11 18:26 ` Suravee Suthikulpanit
2013-04-11 18:34 ` Boris Ostrovsky
2013-04-11 19:30 ` Suravee Suthikulpanit
2013-04-16 15:41 ` Konrad Rzeszutek Wilk
2013-04-16 17:12 ` Jacob Shin
2013-04-16 18:36 ` Konrad Rzeszutek Wilk
2013-06-19 22:56 ` Suravee Suthikulanit
2013-06-19 23:32 ` Boris Ostrovsky
2013-06-19 23:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 4/8] x86/AMD: Stop counters on VPMU save Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 5/8] x86/VPMU: Add Haswell support Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 6/8] x86/VPMU: Factor out VPMU common code Boris Ostrovsky
2013-04-10 16:03 ` Nakajima, Jun
2013-04-09 17:26 ` [PATCH 7/8] x86/VPMU: Save/restore VPMU only when necessary Boris Ostrovsky
2013-04-10 8:57 ` Dietmar Hahn
2013-04-10 12:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 8/8] x86/AMD: Clean up context_update() in AMD VPMU code Boris Ostrovsky
2013-04-11 19:48 ` Suravee Suthikulpanit
2013-04-11 20:42 ` Boris Ostrovsky
2013-04-10 8:57 ` [PATCH 0/8] Various VPMU patches Dietmar Hahn
2013-04-10 18:49 ` Suravee Suthikulanit
2013-04-10 19:10 ` Boris Ostrovsky
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