From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Ostrovsky Subject: [PATCH 1/8] x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map Date: Tue, 9 Apr 2013 13:26:12 -0400 Message-ID: <1365528379-2516-2-git-send-email-boris.ostrovsky@oracle.com> References: <1365528379-2516-1-git-send-email-boris.ostrovsky@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1365528379-2516-1-git-send-email-boris.ostrovsky@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: dietmar.hahn@ts.fujitsu.com, suravee.suthikulpanit@amd.com, jun.nakajima@intel.com, haitao.shan@intel.com, jacob.shin@amd.com Cc: Boris Ostrovsky , xen-devel@lists.xen.org List-Id: xen-devel@lists.xenproject.org Currently VMCB's MSRPM can be updated to either intercept both reads and writes to an MSR or not intercept neither. In some cases we may want to be more selective and intercept one but not the other. Signed-off-by: Boris Ostrovsky --- xen/arch/x86/hvm/svm/svm.c | 15 +++++++-------- xen/include/asm-x86/hvm/svm/vmcb.h | 8 ++++++-- 2 files changed, 13 insertions(+), 10 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index f170ffb..8ce37c9 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -137,7 +137,7 @@ svm_msrbit(unsigned long *msr_bitmap, uint32_t msr) return msr_bit; } -void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable) +void svm_intercept_msr(struct vcpu *v, uint32_t msr, int flags) { unsigned long *msr_bit; @@ -145,16 +145,15 @@ void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable) BUG_ON(msr_bit == NULL); msr &= 0x1fff; - if ( enable ) - { - __set_bit(msr * 2, msr_bit); + if ( flags & MSR_INTERCEPT_READ ) + __set_bit(msr * 2, msr_bit); + else + __clear_bit(msr * 2, msr_bit); + + if ( flags & MSR_INTERCEPT_WRITE ) __set_bit(msr * 2 + 1, msr_bit); - } else - { - __clear_bit(msr * 2, msr_bit); __clear_bit(msr * 2 + 1, msr_bit); - } } static void svm_save_dr(struct vcpu *v) diff --git a/xen/include/asm-x86/hvm/svm/vmcb.h b/xen/include/asm-x86/hvm/svm/vmcb.h index b7c0404..ade4bb2 100644 --- a/xen/include/asm-x86/hvm/svm/vmcb.h +++ b/xen/include/asm-x86/hvm/svm/vmcb.h @@ -531,9 +531,13 @@ void svm_destroy_vmcb(struct vcpu *v); void setup_vmcb_dump(void); +#define MSR_INTERCEPT_NONE 0 +#define MSR_INTERCEPT_READ 1 +#define MSR_INTERCEPT_WRITE 2 +#define MSR_INTERCEPT_RW (MSR_INTERCEPT_WRITE | MSR_INTERCEPT_READ) void svm_intercept_msr(struct vcpu *v, uint32_t msr, int enable); -#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 0) -#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), 1) +#define svm_disable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_NONE) +#define svm_enable_intercept_for_msr(v, msr) svm_intercept_msr((v), (msr), MSR_INTERCEPT_RW) /* * VMCB accessor functions. -- 1.8.1.2