[PATCH 2/4] xen/arm: introduce Allwinner sun6i SOC basic support

[Bamvor Jian Zhang <bjzhang@suse.com>]

Allwinner A31(code name sun6i) is a quad-core Cortex-A7 SOC. Allwinner has
released the source code in http://git.rhombus-tech.net.

This patch define registers and macros for early printk and mode switch.
kick cpu is not implemneted yet. because the secondary cpu boot up
sequence is a little bit different from exynos5.

Signed-off-by: Bamvor Jian Zhang <bjzhang@suse.com>
---
 xen/arch/arm/arm32/debug-sun6i.inc    | 50 +++++++++++++++++++++++++++++++++++
 xen/include/asm-arm/platforms/sun6i.h | 28 ++++++++++++++++++++
 2 files changed, 78 insertions(+)
 create mode 100644 xen/arch/arm/arm32/debug-sun6i.inc
 create mode 100644 xen/include/asm-arm/platforms/sun6i.h

diff --git a/xen/arch/arm/arm32/debug-sun6i.inc b/xen/arch/arm/arm32/debug-sun6i.inc
new file mode 100644
index 0000000..eaa1197
--- /dev/null
+++ b/xen/arch/arm/arm32/debug-sun6i.inc
@@ -0,0 +1,50 @@
+/*
+ * xen/arch/arm/arm32/debug-sun6i.inc
+ *
+ * Allwinner sun6i specific debug code
+ *
+ * Bamvor Jian Zhang <bjzhang@suse.com>
+ * Copyright (c) 2013 SUSE
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/* sun6i UART initialization
+ * rb: register which contains the UART base address
+ * rc: scratch register 1 (unused here)
+ * rd: scratch register 2 (unused here) */
+.macro early_uart_init rb, rc, rd
+/* assume the uart already init by bootloader */
+.endm
+
+/* sun6i UART wait UART to be ready to transmit
+ * rb: register which contains the UART base address
+ * rc: scratch register */
+.macro early_uart_ready rb, rc
+1:
+        ldr   \rc, [\rb, #0x7c]     /* <- UART_USR (Status Register) */
+        tst   \rc, #0x2             /* Check BUSY bit */
+        beq   1b                    /* Wait for the UART to be ready */
+.endm
+
+/* sun6i UART transmit character
+ * rb: register which contains the UART base address
+ * rt: register which contains the character to transmit */
+.macro early_uart_transmit rb, rt
+        str   \rt, [\rb]            /* -> UART_THR (Transmit Holding Register) */
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/platforms/sun6i.h b/xen/include/asm-arm/platforms/sun6i.h
new file mode 100644
index 0000000..f910ad6
--- /dev/null
+++ b/xen/include/asm-arm/platforms/sun6i.h
@@ -0,0 +1,28 @@
+#ifndef __ASM_ARM_PLATFORMS_SUN6I_H
+#define __ASM_ASM_PLATFORMS_SUN6I_H
+
+/* Constants below is only used in assembly because the DTS is not yet parsed */
+#ifdef __ASSEMBLY__
+
+/* GIC Base Address */
+#define SUN6I_GIC_BASE_ADDRESS       0x01c82000
+
+/* Timer's frequency */
+/* \TODO I do not know yet, assume it 24MHz. check it later */
+#define SUN6I_TIMER_FREQUENCY       (24 * 1000 * 1000) /* 24 MHz */
+
+/* Arndale machine ID */
+/* XXX 3894 is downstream number for sun6i. 4137 is upstream number for sun6i */
+#define MACH_TYPE_SUN6I             4137
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_PLATFORMS_SUN6I_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
-- 
1.8.1.4