[PATCH] xen/arm: Update VTCR to use region size of 2^40 bytes instead of 2^39

[Julien Grall <julien.grall@linaro.org>]

According to the ARM manual, T0SZ is a 4-bit signed integer.
The current value of T0SZ = b1000 which is equal to -7. This is result
to a size of 2^39 bytes instead of the desired value 2^40.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
---
 xen/arch/arm/mm.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index d1290cd..7d4e186 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -315,9 +315,9 @@ void __cpuinit setup_virt_paging(void)
     /* Setup Stage 2 address translation */
     /* SH0=00, ORGN0=IRGN0=01
      * SL0=01 (Level-1)
-     * T0SZ=(1)1000 = -8 (40 bit physical addresses)
+     * T0SZ=(1)1111 = -8 (40 bit physical addresses)
      */
-    WRITE_SYSREG32(0x80002558, VTCR_EL2); isb();
+    WRITE_SYSREG32(0x8000255f, VTCR_EL2); isb();
 }
 
 /* This needs to be a macro to stop the compiler spilling to the stack
-- 
1.7.10.4