* [PATCH] xen: arm: remove unnecessary cache flush in write_pte
@ 2013-07-17 11:19 Ian Campbell
2013-07-29 14:57 ` Ian Campbell
0 siblings, 1 reply; 5+ messages in thread
From: Ian Campbell @ 2013-07-17 11:19 UTC (permalink / raw)
To: xen-devel; +Cc: julien.grall, tim, Ian Campbell, stefano.stabellini
On a ARMv7/v8 SMP system the MMU is coherent
Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/include/asm-arm/arm32/page.h | 2 --
xen/include/asm-arm/arm64/page.h | 2 --
2 files changed, 0 insertions(+), 4 deletions(-)
diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
index 38bcffd..3a06a22 100644
--- a/xen/include/asm-arm/arm32/page.h
+++ b/xen/include/asm-arm/arm32/page.h
@@ -16,8 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
/* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
"strd %0, %H0, [%1];"
"dsb;"
- /* Push this cacheline to the PoC so the rest of the system sees it. */
- STORE_CP32(1, DCCMVAC)
/* Ensure that the data flush is completed before proceeding */
"dsb;"
: : "r" (pte.bits), "r" (p) : "memory");
diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h
index bd48fe3..542f886 100644
--- a/xen/include/asm-arm/arm64/page.h
+++ b/xen/include/asm-arm/arm64/page.h
@@ -11,8 +11,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
"dsb sy;"
"str %0, [%1];" /* Write the entry */
"dsb sy;"
- /* Push this cacheline to the PoC so the rest of the system sees it. */
- "dc cvac, %1;"
/* Ensure that the data flush is completed before proceeding */
"dsb sy;"
: : "r" (pte.bits), "r" (p) : "memory");
--
1.7.2.5
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH] xen: arm: remove unnecessary cache flush in write_pte
2013-07-17 11:19 [PATCH] xen: arm: remove unnecessary cache flush in write_pte Ian Campbell
@ 2013-07-29 14:57 ` Ian Campbell
2013-07-29 15:12 ` Tim Deegan
0 siblings, 1 reply; 5+ messages in thread
From: Ian Campbell @ 2013-07-29 14:57 UTC (permalink / raw)
To: xen-devel; +Cc: julien.grall, tim, stefano.stabellini
ping?
On Wed, 2013-07-17 at 12:19 +0100, Ian Campbell wrote:
> On a ARMv7/v8 SMP system the MMU is coherent
>
> Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
> Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> ---
> xen/include/asm-arm/arm32/page.h | 2 --
> xen/include/asm-arm/arm64/page.h | 2 --
> 2 files changed, 0 insertions(+), 4 deletions(-)
>
> diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
> index 38bcffd..3a06a22 100644
> --- a/xen/include/asm-arm/arm32/page.h
> +++ b/xen/include/asm-arm/arm32/page.h
> @@ -16,8 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> /* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
> "strd %0, %H0, [%1];"
> "dsb;"
> - /* Push this cacheline to the PoC so the rest of the system sees it. */
> - STORE_CP32(1, DCCMVAC)
> /* Ensure that the data flush is completed before proceeding */
> "dsb;"
> : : "r" (pte.bits), "r" (p) : "memory");
> diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h
> index bd48fe3..542f886 100644
> --- a/xen/include/asm-arm/arm64/page.h
> +++ b/xen/include/asm-arm/arm64/page.h
> @@ -11,8 +11,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> "dsb sy;"
> "str %0, [%1];" /* Write the entry */
> "dsb sy;"
> - /* Push this cacheline to the PoC so the rest of the system sees it. */
> - "dc cvac, %1;"
> /* Ensure that the data flush is completed before proceeding */
> "dsb sy;"
> : : "r" (pte.bits), "r" (p) : "memory");
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: remove unnecessary cache flush in write_pte
2013-07-29 14:57 ` Ian Campbell
@ 2013-07-29 15:12 ` Tim Deegan
2013-07-29 15:16 ` Ian Campbell
0 siblings, 1 reply; 5+ messages in thread
From: Tim Deegan @ 2013-07-29 15:12 UTC (permalink / raw)
To: Ian Campbell; +Cc: julien.grall, stefano.stabellini, xen-devel
At 15:57 +0100 on 29 Jul (1375113450), Ian Campbell wrote:
> ping?
>
> On Wed, 2013-07-17 at 12:19 +0100, Ian Campbell wrote:
> > On a ARMv7/v8 SMP system the MMU is coherent
> >
> > Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
> > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> > ---
> > xen/include/asm-arm/arm32/page.h | 2 --
> > xen/include/asm-arm/arm64/page.h | 2 --
> > 2 files changed, 0 insertions(+), 4 deletions(-)
> >
> > diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
> > index 38bcffd..3a06a22 100644
> > --- a/xen/include/asm-arm/arm32/page.h
> > +++ b/xen/include/asm-arm/arm32/page.h
> > @@ -16,8 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> > /* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
> > "strd %0, %H0, [%1];"
> > "dsb;"
> > - /* Push this cacheline to the PoC so the rest of the system sees it. */
> > - STORE_CP32(1, DCCMVAC)
> > /* Ensure that the data flush is completed before proceeding */
> > "dsb;"
We should drop this DSB and its comment too (likewise for the second
'dsb sy' below). With that change, Acked-by: Tim Deegan <tim@xen.org>.
Tim.
> > : : "r" (pte.bits), "r" (p) : "memory");
> > diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h
> > index bd48fe3..542f886 100644
> > --- a/xen/include/asm-arm/arm64/page.h
> > +++ b/xen/include/asm-arm/arm64/page.h
> > @@ -11,8 +11,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> > "dsb sy;"
> > "str %0, [%1];" /* Write the entry */
> > "dsb sy;"
> > - /* Push this cacheline to the PoC so the rest of the system sees it. */
> > - "dc cvac, %1;"
> > /* Ensure that the data flush is completed before proceeding */
> > "dsb sy;"
> > : : "r" (pte.bits), "r" (p) : "memory");
>
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: remove unnecessary cache flush in write_pte
2013-07-29 15:12 ` Tim Deegan
@ 2013-07-29 15:16 ` Ian Campbell
2013-07-29 15:58 ` Ian Campbell
0 siblings, 1 reply; 5+ messages in thread
From: Ian Campbell @ 2013-07-29 15:16 UTC (permalink / raw)
To: Tim Deegan; +Cc: julien.grall, stefano.stabellini, xen-devel
On Mon, 2013-07-29 at 16:12 +0100, Tim Deegan wrote:
> At 15:57 +0100 on 29 Jul (1375113450), Ian Campbell wrote:
> > ping?
> >
> > On Wed, 2013-07-17 at 12:19 +0100, Ian Campbell wrote:
> > > On a ARMv7/v8 SMP system the MMU is coherent
> > >
> > > Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
> > > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> > > ---
> > > xen/include/asm-arm/arm32/page.h | 2 --
> > > xen/include/asm-arm/arm64/page.h | 2 --
> > > 2 files changed, 0 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
> > > index 38bcffd..3a06a22 100644
> > > --- a/xen/include/asm-arm/arm32/page.h
> > > +++ b/xen/include/asm-arm/arm32/page.h
> > > @@ -16,8 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> > > /* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
> > > "strd %0, %H0, [%1];"
> > > "dsb;"
> > > - /* Push this cacheline to the PoC so the rest of the system sees it. */
> > > - STORE_CP32(1, DCCMVAC)
> > > /* Ensure that the data flush is completed before proceeding */
> > > "dsb;"
>
> We should drop this DSB and its comment too (likewise for the second
> 'dsb sy' below).
True, thanks.
> With that change, Acked-by: Tim Deegan <tim@xen.org>.
Cheers.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] xen: arm: remove unnecessary cache flush in write_pte
2013-07-29 15:16 ` Ian Campbell
@ 2013-07-29 15:58 ` Ian Campbell
0 siblings, 0 replies; 5+ messages in thread
From: Ian Campbell @ 2013-07-29 15:58 UTC (permalink / raw)
To: Tim Deegan; +Cc: julien.grall, xen-devel, stefano.stabellini
On Mon, 2013-07-29 at 16:16 +0100, Ian Campbell wrote:
> On Mon, 2013-07-29 at 16:12 +0100, Tim Deegan wrote:
> > At 15:57 +0100 on 29 Jul (1375113450), Ian Campbell wrote:
> > > ping?
> > >
> > > On Wed, 2013-07-17 at 12:19 +0100, Ian Campbell wrote:
> > > > On a ARMv7/v8 SMP system the MMU is coherent
> > > >
> > > > Suggested-by: Marc Zyngier <marc.zyngier@arm.com>
> > > > Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
> > > > ---
> > > > xen/include/asm-arm/arm32/page.h | 2 --
> > > > xen/include/asm-arm/arm64/page.h | 2 --
> > > > 2 files changed, 0 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
> > > > index 38bcffd..3a06a22 100644
> > > > --- a/xen/include/asm-arm/arm32/page.h
> > > > +++ b/xen/include/asm-arm/arm32/page.h
> > > > @@ -16,8 +16,6 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
> > > > /* Safely write the entry (STRD is atomic on CPUs that support LPAE) */
> > > > "strd %0, %H0, [%1];"
> > > > "dsb;"
> > > > - /* Push this cacheline to the PoC so the rest of the system sees it. */
> > > > - STORE_CP32(1, DCCMVAC)
> > > > /* Ensure that the data flush is completed before proceeding */
> > > > "dsb;"
> >
> > We should drop this DSB and its comment too (likewise for the second
> > 'dsb sy' below).
>
> True, thanks.
>
> > With that change, Acked-by: Tim Deegan <tim@xen.org>.
>
> Cheers.
And now applied...
>
>
>
>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2013-07-29 15:58 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-07-17 11:19 [PATCH] xen: arm: remove unnecessary cache flush in write_pte Ian Campbell
2013-07-29 14:57 ` Ian Campbell
2013-07-29 15:12 ` Tim Deegan
2013-07-29 15:16 ` Ian Campbell
2013-07-29 15:58 ` Ian Campbell
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).