From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: [PATCH 6/8] exynos4210: rename UTRSTAT_TX_EMPTY in UTRSTAT_TXFE Date: Thu, 25 Jul 2013 17:59:32 +0100 Message-ID: <1374771574-7848-7-git-send-email-julien.grall@linaro.org> References: <1374771574-7848-1-git-send-email-julien.grall@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1374771574-7848-1-git-send-email-julien.grall@linaro.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: patches@linaro.org, ian.campbell@citrix.com, Julien Grall , Stefano.Stabellini@eu.citrix.com List-Id: xen-devel@lists.xenproject.org --- xen/arch/arm/arm32/debug-exynos4210.inc | 2 +- xen/include/asm-arm/exynos4210-uart.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm32/debug-exynos4210.inc b/xen/arch/arm/arm32/debug-exynos4210.inc index d746c35..5a5ff68 100644 --- a/xen/arch/arm/arm32/debug-exynos4210.inc +++ b/xen/arch/arm/arm32/debug-exynos4210.inc @@ -56,7 +56,7 @@ .macro early_uart_ready rb rc 1: ldr \rc, [\rb, #UTRSTAT] /* <- UTRSTAT (Flag register) */ - tst \rc, #UTRSTAT_TX_EMPTY /* Check BUSY bit */ + tst \rc, #UTRSTAT_TXFE /* Check BUSY bit */ beq 1b /* Wait for the UART to be ready */ .endm diff --git a/xen/include/asm-arm/exynos4210-uart.h b/xen/include/asm-arm/exynos4210-uart.h index 330e1c0..bd9a4be 100644 --- a/xen/include/asm-arm/exynos4210-uart.h +++ b/xen/include/asm-arm/exynos4210-uart.h @@ -87,7 +87,7 @@ #define UFSTAT_RX_COUNT_MASK (0xff << UFSTAT_RX_COUNT_SHIFT) /* UTRSTAT */ -#define UTRSTAT_TX_EMPTY (1 << 1) +#define UTRSTAT_TXFE (1 << 1) /* URHX */ #define URXH_DATA_MASK (0xff) -- 1.7.10.4