[PATCH v3 0/4] Nested VMX: APIC-v related bug fixing

[Yang Zhang <yang.z.zhang@intel.com>]

From: Yang Zhang <yang.z.zhang@Intel.com>

The following patches fix the issue that fail to boot L2 guest on APIC-v
available machine. The main problem is that with APIC-v, virtual interrupt inject
L1 is totally through APIC-v. But if virtual interrupt is arrived when L2 is running,
L1 will detect interrupt through vmexit with reason external interrupt. If this happens,
we should update RVI/SVI to make APIC-v working accordingly.

Changes from V2:
*   Rebase on top of Xen upstream
*   Merge patch 1(Introduce interrupt source supporting) and patch 3(Add interface to update vPPR)
    into the place where there were used.
*   Reorder the patch set.

Yang Zhang (4):
  Nested VMX: Check whether interrupt is blocked by TPR
  Nested VMX: Force check ISR when L2 is running
  Nested VMX: Clear APIC-v control bit in vmcs02
  Nested VMX: Update APIC-v(RVI/SVI) when vmexit to L1

 xen/arch/x86/hvm/irq.c             |    2 +-
 xen/arch/x86/hvm/vlapic.c          |   24 +++++++++++++-----
 xen/arch/x86/hvm/vmx/intr.c        |    9 +++++-
 xen/arch/x86/hvm/vmx/vmx.c         |   14 ++++++----
 xen/arch/x86/hvm/vmx/vvmx.c        |   45 ++++++++++++++++++++++++++++++++++++
 xen/include/asm-x86/hvm/vlapic.h   |    3 +-
 xen/include/asm-x86/hvm/vmx/vmx.h  |    2 +-
 xen/include/asm-x86/hvm/vmx/vvmx.h |    1 +
 8 files changed, 82 insertions(+), 18 deletions(-)