From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mukesh Rathor Subject: [V11 PATCH 08/21] PVH xen: introduce pvh_vcpu_boot_set_info() and vmx_pvh_vcpu_boot_set_info() Date: Thu, 22 Aug 2013 18:18:57 -0700 Message-ID: <1377220750-19514-9-git-send-email-mukesh.rathor@oracle.com> References: <1377220750-19514-1-git-send-email-mukesh.rathor@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1377220750-19514-1-git-send-email-mukesh.rathor@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org vmx_pvh_vcpu_boot_set_info() is added to a new file pvh.c, to which more changes are added later, like pvh vmexit handler. Changes in V11: - vmx_pvh_vcpu_boot_set_info pretty much redone to be minimal. Signed-off-by: Mukesh Rathor Acked-by: Keir Fraser Reviewed-by: Andrew Cooper PV-HVM-Regression-Tested-by: Andrew Cooper --- xen/arch/x86/hvm/vmx/Makefile | 1 + xen/arch/x86/hvm/vmx/pvh.c | 54 +++++++++++++++++++++++++++++++++++++ xen/arch/x86/hvm/vmx/vmx.c | 1 + xen/include/asm-x86/hvm/hvm.h | 9 ++++++ xen/include/asm-x86/hvm/vmx/vmx.h | 2 + xen/include/public/arch-x86/xen.h | 4 +++ 6 files changed, 71 insertions(+), 0 deletions(-) create mode 100644 xen/arch/x86/hvm/vmx/pvh.c diff --git a/xen/arch/x86/hvm/vmx/Makefile b/xen/arch/x86/hvm/vmx/Makefile index 373b3d9..59fb5d4 100644 --- a/xen/arch/x86/hvm/vmx/Makefile +++ b/xen/arch/x86/hvm/vmx/Makefile @@ -1,5 +1,6 @@ obj-bin-y += entry.o obj-y += intr.o +obj-y += pvh.o obj-y += realmode.o obj-y += vmcs.o obj-y += vmx.o diff --git a/xen/arch/x86/hvm/vmx/pvh.c b/xen/arch/x86/hvm/vmx/pvh.c new file mode 100644 index 0000000..526ce2b --- /dev/null +++ b/xen/arch/x86/hvm/vmx/pvh.c @@ -0,0 +1,54 @@ +/* + * Copyright (C) 2013, Mukesh Rathor, Oracle Corp. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public + * License v2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Set vmcs fields during boot of a vcpu. Called from arch_set_info_guest. + * + * Boot vcpu call is from tools via: + * do_domctl -> XEN_DOMCTL_setvcpucontext -> arch_set_info_guest + * + * Secondary vcpu's are brought up by the guest itself via: + * do_vcpu_op -> VCPUOP_initialise -> arch_set_info_guest + * (In case of linux, the call comes from cpu_initialize_context()). + * + * Note, PVH save/restore is expected to happen the HVM way, ie, + * do_domctl -> XEN_DOMCTL_sethvmcontext -> hvm_load/save + * and not get here. + * + * PVH 32bitfixme: this function needs to be modified for 32bit guest. + */ +int vmx_pvh_vcpu_boot_set_info(struct vcpu *v, + struct vcpu_guest_context *ctxtp) +{ + if ( ctxtp->ldt_base || ctxtp->ldt_ents || + ctxtp->user_regs.cs || ctxtp->user_regs.ss || ctxtp->user_regs.es || + ctxtp->user_regs.ds || ctxtp->user_regs.fs || ctxtp->user_regs.gs || + *ctxtp->gdt_frames || ctxtp->gdt_ents || + ctxtp->fs_base || ctxtp->gs_base_user ) + return -EINVAL; + + vmx_vmcs_enter(v); + __vmwrite(GUEST_GS_BASE, ctxtp->gs_base_kernel); + vmx_vmcs_exit(v); + + return 0; +} diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index 7292357..a778dca 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1562,6 +1562,7 @@ static struct hvm_function_table __initdata vmx_function_table = { .sync_pir_to_irr = vmx_sync_pir_to_irr, .handle_eoi = vmx_handle_eoi, .nhvm_hap_walk_L1_p2m = nvmx_hap_walk_L1_p2m, + .pvh_vcpu_boot_set_info = vmx_pvh_vcpu_boot_set_info, }; const struct hvm_function_table * __init start_vmx(void) diff --git a/xen/include/asm-x86/hvm/hvm.h b/xen/include/asm-x86/hvm/hvm.h index 00489cf..1bd8fc9 100644 --- a/xen/include/asm-x86/hvm/hvm.h +++ b/xen/include/asm-x86/hvm/hvm.h @@ -193,6 +193,9 @@ struct hvm_function_table { paddr_t *L1_gpa, unsigned int *page_order, uint8_t *p2m_acc, bool_t access_r, bool_t access_w, bool_t access_x); + + int (*pvh_vcpu_boot_set_info)(struct vcpu *v, + struct vcpu_guest_context *ctxtp); }; extern struct hvm_function_table hvm_funcs; @@ -326,6 +329,12 @@ static inline unsigned long hvm_get_shadow_gs_base(struct vcpu *v) return hvm_funcs.get_shadow_gs_base(v); } +static inline int pvh_vcpu_boot_set_info(struct vcpu *v, + struct vcpu_guest_context *ctxtp) +{ + return hvm_funcs.pvh_vcpu_boot_set_info(v, ctxtp); +} + #define is_viridian_domain(_d) \ (is_hvm_domain(_d) && ((_d)->arch.hvm_domain.params[HVM_PARAM_VIRIDIAN])) diff --git a/xen/include/asm-x86/hvm/vmx/vmx.h b/xen/include/asm-x86/hvm/vmx/vmx.h index c21a303..3ad2188 100644 --- a/xen/include/asm-x86/hvm/vmx/vmx.h +++ b/xen/include/asm-x86/hvm/vmx/vmx.h @@ -473,6 +473,8 @@ void vmx_update_guest_eip(void); void vmx_dr_access(unsigned long exit_qualification, struct cpu_user_regs *regs); void vmx_fpu_enter(struct vcpu *v); +int vmx_pvh_vcpu_boot_set_info(struct vcpu *v, + struct vcpu_guest_context *ctxtp); int alloc_p2m_hap_data(struct p2m_domain *p2m); void free_p2m_hap_data(struct p2m_domain *p2m); diff --git a/xen/include/public/arch-x86/xen.h b/xen/include/public/arch-x86/xen.h index b7f6a51..4f12f50 100644 --- a/xen/include/public/arch-x86/xen.h +++ b/xen/include/public/arch-x86/xen.h @@ -150,6 +150,10 @@ typedef uint64_t tsc_timestamp_t; /* RDTSC timestamp */ /* * The following is all CPU context. Note that the fpu_ctxt block is filled * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used. + * + * PVH 64bit: In the vcpu boot path, for vmcs context, only gs_base_kernel + * is honored. Other fields like gdt, ldt, and selectors must be + * zeroed. See vmx_pvh_vcpu_boot_set_info. */ struct vcpu_guest_context { /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */ -- 1.7.2.3