From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yang Zhang Subject: [PATCH v2 1/3] Nested VMX: Check VMX capability before read VMX related MSRs. Date: Tue, 10 Sep 2013 14:14:25 +0800 Message-ID: <1378793667-6694-2-git-send-email-yang.z.zhang@intel.com> References: <1378793667-6694-1-git-send-email-yang.z.zhang@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1378793667-6694-1-git-send-email-yang.z.zhang@intel.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xensource.com Cc: Yang Zhang , Andrew.Cooper3@citrix.com, eddie.dong@intel.com, JBeulich@suse.com List-Id: xen-devel@lists.xenproject.org From: Yang Zhang VMX MSRs only available when the CPU support the VMX feature. In addition, VMX_TRUE* MSRs only available when bit 55 of VMX_BASIC MSR is set. Signed-off-by: Yang Zhang --- xen/arch/x86/hvm/vmx/vvmx.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index cecc72f..c6c8b88 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1814,12 +1814,31 @@ int nvmx_handle_invvpid(struct cpu_user_regs *regs) int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) { struct vcpu *v = current; + unsigned int eax, ebx, ecx, edx; u64 data = 0, host_data = 0; int r = 1; if ( !nestedhvm_enabled(v->domain) ) return 0; + /* + * VMX capablitys MSRs available only when guest + * support VMX. + */ + hvm_cpuid(0x1, &eax, &ebx, &ecx, &edx); + if ( !(ecx & cpufeat_mask(X86_FEATURE_VMXE)) ) + return 0; + + /* + * Those MSRs available only when bit 55 of + * MSR_IA32_VMX_BASIC is set. + */ + rdmsrl(MSR_IA32_VMX_BASIC, data); + if ( msr >= MSR_IA32_VMX_TRUE_PINBASED_CTLS && + msr <= MSR_IA32_VMX_TRUE_ENTRY_CTLS && + !(data & VMX_BASIC_DEFAULT1_ZERO) ) + return 0; + rdmsrl(msr, host_data); /* -- 1.7.1