From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: julien.grall@citrix.com, tim@xen.org,
Ian Campbell <ian.campbell@citrix.com>,
stefano.stabellini@eu.citrix.com
Subject: [PATCH RFC 7/7] xen: arm: split cpu0's domheap mapping PTs out from xen_second
Date: Tue, 17 Sep 2013 02:40:50 +0100 [thread overview]
Message-ID: <1379382050-11821-7-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1379381846.11304.73.camel@hastur.hellion.org.uk>
Now that bringup has been rewritten we don't need these 4 contiguous pages for
the 1:1 map. So split them out and only allocate them for 32 bit
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/arch/arm/mm.c | 35 +++++++++++++++++------------------
1 file changed, 17 insertions(+), 18 deletions(-)
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index efac619..984c201 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -94,8 +94,11 @@ static DEFINE_PER_CPU(lpae_t *, xen_pgtable);
* the second level pagetables which map the domheap region
* DOMHEAP_VIRT_START...DOMHEAP_VIRT_END in 2MB chunks. */
static DEFINE_PER_CPU(lpae_t *, xen_dommap);
-/* Root of the trie for cpu0 */
+/* Root of the trie for cpu0, other CPU's PTs are dynamically allocated */
lpae_t cpu0_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096)));
+/* cpu0's domheap page tables */
+lpae_t cpu0_dommap[LPAE_ENTRIES*DOMHEAP_SECOND_PAGES]
+ __attribute__((__aligned__(4096*DOMHEAP_SECOND_PAGES)));
#endif
#ifdef CONFIG_ARM_64
@@ -115,19 +118,8 @@ static __initdata int xenheap_first_first_slot = -1;
* The second-level table is 2 contiguous pages long, and covers all
* addresses from 0 to 0x7fffffff. Offsets into it are calculated
* with second_linear_offset(), not second_table_offset().
- *
- * On 32bit addresses 0x80000000 to 0xffffffff are covered by the
- * per-cpu xen_domheap mappings described above. We allocate 4 pages
- * here for use in the boot page tables and the second two pages
- * become the boot CPUs xen_dommap pages.
- *
- * On 64bit addresses 0x80000000 to 0xffffffff are unused. However we
- * allocate 4 pages here for use while relocating Xen, which currently
- * expects a second level page to exist for all addresses in the first
- * 4GB. We need to keep these extra mappings in place for seconary CPU
- * bring up too. For now we just leave them forever.
*/
-lpae_t xen_second[LPAE_ENTRIES*4] __attribute__((__aligned__(4096*4)));
+lpae_t xen_second[LPAE_ENTRIES*2] __attribute__((__aligned__(4096*2)));
/* First level page table used for fixmap */
lpae_t xen_fixmap[LPAE_ENTRIES] __attribute__((__aligned__(4096)));
/* First level page table used to map Xen itself with the XN bit set
@@ -428,13 +420,22 @@ void __init setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr)
#endif
/* Initialise first level entries, to point to second level entries */
- for ( i = 0; i < 4; i++)
+ for ( i = 0; i < 2; i++)
{
p[i] = pte_of_xenaddr((uintptr_t)(xen_second+i*LPAE_ENTRIES));
p[i].pt.table = 1;
p[i].pt.xn = 0;
}
+#ifdef CONFIG_ARM_32
+ for ( i = 0; i < DOMHEAP_SECOND_PAGES; i++ )
+ {
+ p[first_table_offset(DOMHEAP_VIRT_START+i*FIRST_SIZE)]
+ = pte_of_xenaddr((uintptr_t)(cpu0_dommap+i*LPAE_ENTRIES));
+ p[first_table_offset(DOMHEAP_VIRT_START+i*FIRST_SIZE)].pt.table = 1;
+ }
+#endif
+
/* Initialise xen second level entries ... */
/* ... Xen's text etc */
@@ -497,11 +498,9 @@ void __init setup_pagetables(unsigned long boot_phys_offset, paddr_t xen_paddr)
#ifdef CONFIG_ARM_32
per_cpu(xen_pgtable, 0) = cpu0_pgtable;
- per_cpu(xen_dommap, 0) = xen_second +
- second_linear_offset(DOMHEAP_VIRT_START);
+ per_cpu(xen_dommap, 0) = cpu0_dommap;
- /* Some of these slots may have been used during start of day and/or
- * relocation. Make sure they are clear now. */
+ /* Make sure it is clear */
memset(this_cpu(xen_dommap), 0, DOMHEAP_SECOND_PAGES*PAGE_SIZE);
flush_xen_dcache_va_range(this_cpu(xen_dommap),
DOMHEAP_SECOND_PAGES*PAGE_SIZE);
--
1.8.3.2
next prev parent reply other threads:[~2013-09-17 1:40 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-17 1:37 [PATCH RFC 0/N] xen: arm: rework early bring up Ian Campbell
2013-09-17 1:40 ` [PATCH RFC 1/7] xen: arm: Load xen under 4GB on 32-bit Ian Campbell
2013-09-18 15:44 ` Julien Grall
2013-09-19 9:21 ` Tim Deegan
2013-09-17 1:40 ` [PATCH RFC 2/7] xen: arm: Log the raw MIDR on boot Ian Campbell
2013-09-17 12:05 ` Julien Grall
2013-09-19 9:21 ` Tim Deegan
2013-09-17 1:40 ` [PATCH RFC 3/7] xen: arm: make sure we stay within the memory bank during mm setup Ian Campbell
2013-09-17 12:19 ` Julien Grall
2013-09-19 9:27 ` Tim Deegan
2013-09-17 1:40 ` [PATCH RFC 4/7] xen: arm: add two new device tree helpers Ian Campbell
2013-09-17 13:05 ` Julien Grall
2013-09-18 17:11 ` Julien Grall
2013-09-18 17:14 ` Ian Campbell
2013-09-17 1:40 ` [PATCH RFC 5/7] xen: arm: rewrite start of day page table and cpu bring up Ian Campbell
2013-09-17 16:18 ` Julien Grall
2013-09-17 16:36 ` Ian Campbell
2013-09-17 16:55 ` Julien Grall
2013-09-17 18:30 ` Andre Przywara
2013-09-17 19:19 ` Ian Campbell
2013-09-18 13:57 ` Julien Grall
2013-09-18 15:12 ` Ian Campbell
2013-09-18 17:06 ` Julien Grall
2013-09-18 17:14 ` Ian Campbell
2013-09-19 11:36 ` Tim Deegan
2013-09-20 17:09 ` Ian Campbell
2013-09-20 17:16 ` Ian Campbell
2013-09-19 13:36 ` Tim Deegan
2013-09-17 1:40 ` [PATCH RFC 6/7] xen: arm: configure TCR_EL2 for 40 bit physical address space Ian Campbell
2013-09-18 15:50 ` Julien Grall
2013-09-19 13:42 ` Tim Deegan
2013-09-17 1:40 ` Ian Campbell [this message]
2013-09-19 13:47 ` [PATCH RFC 7/7] xen: arm: split cpu0's domheap mapping PTs out from xen_second Tim Deegan
2013-09-17 11:34 ` [PATCH RFC 0/N] xen: arm: rework early bring up Julien Grall
2013-09-17 12:43 ` Ian Campbell
2013-09-18 13:40 ` Julien Grall
2013-09-18 17:33 ` Julien Grall
2013-09-18 19:22 ` Ian Campbell
2013-09-18 19:24 ` Ian Campbell
2013-09-18 20:00 ` Julien Grall
2013-09-18 20:22 ` Ian Campbell
2013-09-18 21:14 ` Julien Grall
2013-09-18 21:28 ` Ian Campbell
2013-09-19 14:49 ` Julien Grall
2013-09-19 15:51 ` Ian Campbell
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