[PATCH v3 09/11] xen: arm: use symbolic names for MPIDR bits.

[Ian Campbell <ian.campbell@citrix.com>]

arm32 already uses MPIDR_HWID_MASK, use it on arm64 too. Add MPIDR_{SMP,UP}
(and bitwise equivalents) and use them.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
---
v4: Use U not UL, otherwise MPIDR_INVALID can be a 64-bit number, but the
    register is 32-bit so assigning it to a u32 etc is valid. e.g tmp_map in
    init_cpus_map. Avoids -Werror=overflow issues.
v3: Needs to be unsigned, 1<<31 is undefined on arm32 otherwise
---
 xen/arch/arm/arm32/head.S       |    4 ++--
 xen/arch/arm/arm64/head.S       |    6 +++---
 xen/include/asm-arm/processor.h |   10 ++++++----
 3 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 946394c..e5cb266 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -127,9 +127,9 @@ common_start:
                                       * find that multiprocessor extensions are
                                       * present and the system is SMP */
         mrc   CP32(r1, MPIDR)
-        tst   r1, #(1<<31)           /* Multiprocessor extension supported? */
+        tst   r1, #MPIDR_SMP         /* Multiprocessor extension supported? */
         beq   1f
-        tst   r1, #(1<<30)           /* Uniprocessor system? */
+        tst   r1, #MPIDR_UP          /* Uniprocessor system? */
         bne   1f
         bic   r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */
 1:
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index b327770..3dd71af 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -153,10 +153,10 @@ common_start:
                                       * find that multiprocessor extensions are
                                       * present and the system is SMP  */
         mrs   x0, mpidr_el1
-        tbz   x0, 31, 1f             /* Multiprocessor extension not supported? */
-        tbnz  x0, 30, 1f             /* Uniprocessor system? */
+        tbz   x0, _MPIDR_SMP, 1f     /* Multiprocessor extension not supported? */
+        tbnz  x0, _MPIDR_UP, 1f      /* Uniprocessor system? */
 
-        mov   x13, #(0xff << 24)
+        mov   x13, #(~MPIDR_HWID_MASK)
         bic   x24, x0, x13           /* Mask out flags to get CPU ID */
 1:
 
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 0646422..5294421 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -8,11 +8,13 @@
 #define MIDR_MASK    0xff0ffff0
 
 /* MPIDR Multiprocessor Affinity Register */
-#define MPIDR_UP            (1 << 30)
-#define MPIDR_SMP           (1 << 31)
+#define _MPIDR_UP           (30)
+#define MPIDR_UP            (_AC(1,U) << _MPIDR_UP)
+#define _MPIDR_SMP          (31)
+#define MPIDR_SMP           (_AC(1,U) << _MPIDR_SMP)
 #define MPIDR_AFF0_SHIFT    (0)
-#define MPIDR_AFF0_MASK     (0xff << MPIDR_AFF0_SHIFT)
-#define MPIDR_HWID_MASK     0xffffff
+#define MPIDR_AFF0_MASK     (_AC(0xff,U) << MPIDR_AFF0_SHIFT)
+#define MPIDR_HWID_MASK     _AC(0xffffff,U)
 #define MPIDR_INVALID       (~MPIDR_HWID_MASK)
 
 /* TTBCR Translation Table Base Control Register */
-- 
1.7.10.4