From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: Ian Campbell <ian.campbell@citrix.com>,
Anup Patel <anup.patel@linaro.org>,
stefano.stabellini@eu.citrix.com, julien.grall@linaro.org,
tim@xen.org, Pranavkumar Sawargaonkar <psawargaonkar@apm.com>
Subject: [PATCH 4/6] xen: arm: make sure pagetable mask macros have appropriate size
Date: Thu, 10 Oct 2013 15:43:43 +0100 [thread overview]
Message-ID: <1381416225-31043-4-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1381416204.17758.36.camel@kazak.uk.xensource.com>
{ZEROETH,FIRST,SECOND,THIRD}_MASK are used with physical addresses which may
be larger than 32 bits. Therefore ensure that they are wide enough by casting
to paddr_t otherwise we may truncate addresses on 32-bit.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
---
xen/include/asm-arm/page.h | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index 3d0f8a9..d468418 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -323,17 +323,17 @@ static inline int gva_to_ipa(vaddr_t va, paddr_t *paddr)
#define LPAE_ENTRIES (1u << LPAE_SHIFT)
#define LPAE_ENTRY_MASK (LPAE_ENTRIES - 1)
-#define THIRD_SHIFT PAGE_SHIFT
-#define THIRD_SIZE (1u << THIRD_SHIFT)
-#define THIRD_MASK (~(THIRD_SIZE - 1))
-#define SECOND_SHIFT (THIRD_SHIFT + LPAE_SHIFT)
-#define SECOND_SIZE (1u << SECOND_SHIFT)
-#define SECOND_MASK (~(SECOND_SIZE - 1))
-#define FIRST_SHIFT (SECOND_SHIFT + LPAE_SHIFT)
-#define FIRST_SIZE (1u << FIRST_SHIFT)
-#define FIRST_MASK (~(FIRST_SIZE - 1))
+#define THIRD_SHIFT (PAGE_SHIFT)
+#define THIRD_SIZE ((paddr_t)1 << THIRD_SHIFT)
+#define THIRD_MASK (~(THIRD_SIZE - 1))
+#define SECOND_SHIFT (THIRD_SHIFT + LPAE_SHIFT)
+#define SECOND_SIZE ((paddr_t)1 << SECOND_SHIFT)
+#define SECOND_MASK (~(SECOND_SIZE - 1))
+#define FIRST_SHIFT (SECOND_SHIFT + LPAE_SHIFT)
+#define FIRST_SIZE ((paddr_t)1 << FIRST_SHIFT)
+#define FIRST_MASK (~(FIRST_SIZE - 1))
#define ZEROETH_SHIFT (FIRST_SHIFT + LPAE_SHIFT)
-#define ZEROETH_SIZE (1u << ZEROETH_SHIFT)
+#define ZEROETH_SIZE ((paddr_t)1 << ZEROETH_SHIFT)
#define ZEROETH_MASK (~(ZEROETH_SIZE - 1))
/* Calculate the offsets into the pagetables for a given VA */
--
1.7.10.4
next prev parent reply other threads:[~2013-10-10 14:43 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-10 14:43 [PATCH v2 0/6] xen: arm: fixups for systems with RAM above 4GB Ian Campbell
2013-10-10 14:43 ` [PATCH 1/6] xen: correct xenheap_bits after "xen: support RAM at addresses 0 and 4096" Ian Campbell
2013-10-10 15:14 ` Keir Fraser
2013-10-10 14:43 ` [PATCH 2/6] xen: arm: Enable 40 bit addressing in VTCR for arm64 Ian Campbell
2013-10-21 15:56 ` Julien Grall
2013-10-10 14:43 ` [PATCH 3/6] xen: arm: map entire memory banks on arm64 Ian Campbell
2013-10-23 13:54 ` Julien Grall
2013-10-10 14:43 ` Ian Campbell [this message]
2013-10-21 15:53 ` [PATCH 4/6] xen: arm: make sure pagetable mask macros have appropriate size Julien Grall
2013-10-10 14:43 ` [PATCH 5/6] xen: arm: correctly round down MFN to 1GB boundary make sure pagetable mask macros as physaddr size Ian Campbell
2013-10-23 13:52 ` Julien Grall
2013-10-10 14:43 ` [PATCH 6/6] xen: arm: Ensure HCR_EL2.RW is set correctly when building dom0 Ian Campbell
2013-10-23 10:39 ` Julien Grall
2013-10-23 10:41 ` Julien Grall
2013-10-21 9:35 ` [PATCH v2 0/6] xen: arm: fixups for systems with RAM above 4GB Ian Campbell
2013-10-23 13:55 ` Julien Grall
2013-10-24 14:07 ` Ian Campbell
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