From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: [PATCH] x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE. Date: Thu, 14 Nov 2013 14:02:56 +0000 Message-ID: <1384437776-8364-1-git-send-email-andrew.cooper3@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel Cc: Eddie Dong , Keir Fraser , Jan Beulich , Andrew Cooper , Tim Deegan , Paul Durrant , Jun Nakajima List-Id: xen-devel@lists.xenproject.org Intercepting this MSR is pointless - The swapgs instruction does not cause a vmexit, so the cached result of this is potentially stale after the next guest instruction. It is correctly saved and restored on vcpu context switch. Furthermore, 64bit Windows writes to this MSR on every thread context switch, so interception causes a substantial performance hit. From: Paul Durrant Signed-off-by: Paul Durrant Signed-off-by: Andrew Cooper CC: Keir Fraser CC: Jan Beulich CC: Tim Deegan CC: Jun Nakajima CC: Eddie Dong --- xen/arch/x86/hvm/vmx/vmcs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c index 290b42f..4aab971 100644 --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -950,6 +950,7 @@ static int construct_vmcs(struct vcpu *v) vmx_disable_intercept_for_msr(v, MSR_FS_BASE, MSR_TYPE_R | MSR_TYPE_W); vmx_disable_intercept_for_msr(v, MSR_GS_BASE, MSR_TYPE_R | MSR_TYPE_W); + vmx_disable_intercept_for_msr(v, MSR_SHADOW_GS_BASE, MSR_TYPE_R | MSR_TYPE_W); vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS, MSR_TYPE_R | MSR_TYPE_W); vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_ESP, MSR_TYPE_R | MSR_TYPE_W); vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP, MSR_TYPE_R | MSR_TYPE_W); -- 1.7.10.4