From: Ian Campbell <ian.campbell@citrix.com>
To: xen-devel@lists.xen.org
Cc: Ian Campbell <ian.campbell@citrix.com>,
Anup Patel <anup.patel@linaro.org>,
stefano.stabellini@eu.citrix.com, julien.grall@linaro.org,
tim@xen.org, pranavkumar@linaro.org
Subject: [PATCH 16/16] HACK: xen: arm: map PCI controller ranges region MMIOs to dom0.
Date: Wed, 20 Nov 2013 14:48:17 +0000 [thread overview]
Message-ID: <1384958897-13074-16-git-send-email-ian.campbell@citrix.com> (raw)
In-Reply-To: <1384958746.6071.64.camel@kazak.uk.xensource.com>
The ranges property of a node with device_type = "pci" is defined in ePAPR
2.3.8. Map the appropriate MMIO regions through to dom0.
This is a hack/PoC since it actually crashes for some reason. Hence it
contains a hacked in hardcoded list suitable for Xgene while I figure this
out.
This should also eventually handle the interrupt-map and (ePAPR 2.4.3.1) and
possibly dma-ranges (ePAPR 2.3.9) and msi-ranges (unspeciifed?) too.
---
xen/arch/arm/domain_build.c | 103 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 103 insertions(+)
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index aa7e3d2..e778c06 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -702,6 +702,69 @@ static int make_xen_node(const struct domain *d, void *fdt,
return res;
}
+static int map_pci_device_ranges(struct domain *d,
+ const struct dt_device_node *dev,
+ const struct dt_property *ranges)
+{
+ const __be32 *cells;
+
+ int size_cells, addr_cells, i, nr;
+
+ u32 pci_space;
+ u64 child_addr;
+ u64 host_addr;
+ u64 length;
+
+ printk("%s(%p, %p, %p)\n", __func__, d, dev, ranges);
+ printk("%s device %s\n", __func__, dt_node_full_name(dev));
+ return 0;
+
+ cells = ranges->value;
+ printk("%s ranges at %p, length %d\n", __func__, cells, ranges->length);
+ size_cells = dt_n_size_cells(dev);
+ addr_cells = dt_n_addr_cells(dev);
+
+ /*
+ * Range is child address, host address (#address-cells), length
+ * (#size-cells),see ePAPR 2.3.8.
+ *
+ * PCI child address is u32 space + u64 address, see ePAPR 6.2.2.
+ *
+ */
+ nr = ranges->length / ( 3 + size_cells + addr_cells );
+ printk("PCI device %s: #address-cells %d, #size-cells %d. len %d, entries %d\n",
+ dt_node_name(dev), addr_cells, size_cells, ranges->length, nr);
+
+ for ( i = 0; i < nr ; i++ )
+ {
+ pci_space = (u32)dt_next_cell(1, &cells);
+ child_addr = dt_next_cell(2, &cells);
+ host_addr = dt_next_cell(addr_cells, &cells);
+ length = dt_next_cell(size_cells, &cells);
+ printk("PCI SPACE 0x%08x, 0x%"PRIx64" maps to 0x%"PRIx64" size 0x%"PRIx64"\n",
+ pci_space, child_addr, host_addr, length);
+ }
+ return 0;
+}
+
+static int map_device_ranges(struct domain *d, const struct dt_device_node *dev)
+{
+ const struct dt_property *ranges;
+ u32 len;
+
+ ranges = dt_get_property(dev, "ranges", &len);
+ /* No ranges, nothing to do */
+ if ( !ranges )
+ return 0;
+
+ if ( dt_device_type_is_equal(dev, "pci") )
+ return map_pci_device_ranges(d, dev, ranges);
+
+ printk("Cannot handle ranges for non-PCI device type %s\n", dev->type);
+ /* Lets not worry for now... */
+ return 0;
+}
+
/* Map the device in the domain */
static int map_device(struct domain *d, const struct dt_device_node *dev)
{
@@ -767,6 +830,9 @@ static int map_device(struct domain *d, const struct dt_device_node *dev)
DPRINT("addr %u = 0x%"PRIx64" - 0x%"PRIx64"\n",
i, addr, addr + size - 1);
+ if ( size == 0 )
+ continue;
+
res = map_mmio_regions(d, addr & PAGE_MASK,
PAGE_ALIGN(addr + size) - 1,
addr & PAGE_MASK);
@@ -779,6 +845,8 @@ static int map_device(struct domain *d, const struct dt_device_node *dev)
}
}
+ res = map_device_ranges(d, dev);
+
return 0;
}
@@ -903,6 +971,41 @@ static int prepare_dtb(struct domain *d, struct kernel_info *kinfo)
if ( ret )
goto err;
+ {
+ struct dt_irq irq;
+
+ ret = map_mmio_regions(d,
+ 0xe000000000UL,
+ 0xe00fffffffUL,
+ 0xe000000000UL);
+ if (ret) printk("PCI REGION 0 failed\n");
+ ret = map_mmio_regions(d,
+ 0xe080000000UL,
+ 0xe08fffffffUL,
+ 0xe080000000UL);
+ if (ret) printk("PCI REGION 1 failed\n");
+ ret = map_mmio_regions(d,
+ 0xe010000000UL,
+ 0xe010000000UL,
+ 0xe01000ffffUL);
+ if (ret) printk("PCI REGION 2 failed\n");
+
+ irq.type = 0x4;
+
+ irq.irq = 0xc2 + 32;
+ ret = gic_route_irq_to_guest(d, &irq, "PCI#INTA");
+ if (ret) printk("PCI INTA failed\n");
+ irq.irq = 0xc3 + 32;
+ ret = gic_route_irq_to_guest(d, &irq, "PCI#INTB");
+ if (ret) printk("PCI INTB failed\n");
+ irq.irq = 0xc4 + 32;
+ ret = gic_route_irq_to_guest(d, &irq, "PCI#INTC");
+ if (ret) printk("PCI INTC failed\n");
+ irq.irq = 0xc5 + 32;
+ ret = gic_route_irq_to_guest(d, &irq, "PCI#INTD");
+ if (ret) printk("PCI INTD failed\n");
+ }
+
ret = fdt_finish(kinfo->fdt);
if ( ret < 0 )
goto err;
--
1.7.10.4
next prev parent reply other threads:[~2013-11-20 14:48 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-11-20 14:45 [PATCH+RFC+HACK 00/16] xen: arm initial support for xgene arm64 platform Ian Campbell
2013-11-20 14:48 ` [PATCH 01/16] xen: arm64: Add 8250 earlyprintk support Ian Campbell
2013-11-20 16:17 ` Julien Grall
2013-11-20 14:48 ` [PATCH 02/16] xen: arm64: Add Basic Platform support for APM X-Gene Storm Ian Campbell
2013-11-20 16:23 ` Julien Grall
2013-11-20 19:07 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 03/16] xen: arm64: Add APM implementor id to processor implementers Ian Campbell
2013-11-20 16:23 ` Julien Grall
2013-11-20 19:10 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 04/16] xen: arm: include ns16550 driver on arm64 too Ian Campbell
2013-11-20 16:24 ` Julien Grall
2013-11-20 19:10 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 05/16] xen: arm: Enable 1:1 workaround for APM X-Gene Storm Ian Campbell
2013-11-20 19:10 ` Stefano Stabellini
2013-11-21 10:24 ` Ian Campbell
2013-11-20 14:48 ` [PATCH 06/16] xen: arm: early logging of command line Ian Campbell
2013-11-20 16:25 ` Julien Grall
2013-11-20 19:06 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 07/16] xen: arm: Handle cpus nodes with #address-calls > 1 Ian Campbell
2013-11-20 16:31 ` Julien Grall
2013-11-20 16:37 ` Ian Campbell
2013-11-20 16:46 ` Julien Grall
2013-11-20 14:48 ` [PATCH 08/16] xen: arm: Make register bit definitions unsigned Ian Campbell
2013-11-20 19:29 ` Stefano Stabellini
2013-11-21 10:29 ` Ian Campbell
2013-11-20 14:48 ` [PATCH 09/16] xen: arm: explicitly map 64 bit release address Ian Campbell
2013-11-20 19:31 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 10/16] xen: arm: enable synchronous console while starting secondary CPUs Ian Campbell
2013-11-20 17:31 ` Julien Grall
2013-11-20 17:37 ` Ian Campbell
2013-11-21 13:40 ` Julien Grall
2013-11-20 19:22 ` Stefano Stabellini
2013-11-21 10:32 ` Ian Campbell
2013-11-20 14:48 ` [PATCH 11/16] xen: arm: Add debug keyhandler to dump the physical GIC state Ian Campbell
2013-11-20 17:36 ` Julien Grall
2013-11-20 17:48 ` Ian Campbell
2013-11-20 19:17 ` Stefano Stabellini
2013-11-21 10:35 ` Ian Campbell
2013-11-20 14:48 ` [PATCH 12/16] xen: arm: improve early memory map readability Ian Campbell
2013-11-20 17:16 ` Julien Grall
2013-11-20 14:48 ` [PATCH 13/16] RFC: xen: arm: handle 40-bit addresses in the p2m Ian Campbell
2013-11-21 19:17 ` Stefano Stabellini
2013-11-22 9:49 ` Ian Campbell
2013-11-20 14:48 ` [PATCH 14/16] RFC: xen: arm: allow platform code to select dom0 event channel irq Ian Campbell
2013-11-21 18:44 ` Stefano Stabellini
2013-11-20 14:48 ` [PATCH 15/16] HACK: xen: arm: GICC_DIR register at offset 0x10000 instead of 0x1000 Ian Campbell
2013-11-20 14:48 ` Ian Campbell [this message]
2013-11-21 14:32 ` [PATCH 16/16] HACK: xen: arm: map PCI controller ranges region MMIOs to dom0 Julien Grall
2013-11-21 14:57 ` Ian Campbell
2013-11-21 15:42 ` Julien Grall
2013-11-21 15:53 ` Ian Campbell
2013-11-21 15:05 ` [PATCH+RFC+HACK 00/16] xen: arm initial support for xgene arm64 platform George Dunlap
2013-11-21 15:27 ` Stefano Stabellini
2013-11-21 15:38 ` Ian Campbell
2013-11-21 17:14 ` George Dunlap
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