From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: [PATCH v3 4/6] serial: Seperate the PCI device ids and parameters (v1) Date: Wed, 12 Mar 2014 11:27:50 -0400 Message-ID: <1394638072-11331-5-git-send-email-konrad.wilk@oracle.com> References: <1394638072-11331-1-git-send-email-konrad.wilk@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WNl44-0000mS-2w for xen-devel@lists.xenproject.org; Wed, 12 Mar 2014 15:27:28 +0000 Received: by mail-qg0-f45.google.com with SMTP id j5so29515504qga.4 for ; Wed, 12 Mar 2014 08:27:25 -0700 (PDT) In-Reply-To: <1394638072-11331-1-git-send-email-konrad.wilk@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: andrew.cooper3@citrix.com, aravind.gopalakrishnan@amd.com, xen-devel@lists.xenproject.org, jbeulich@suse.com, keir@xen.org List-Id: xen-devel@lists.xenproject.org This will allow us to re-use the parameters for multiple PCI devices. No functional change. Signed-off-by: Konrad Rzeszutek Wilk [v1: s/nr/idx/ of the enum, use __initconst and const by Jan's review] Reviewed-by: Jan Beulich --- xen/drivers/char/ns16550.c | 67 +++++++++++++++++++++++++++++--------------- 1 files changed, 44 insertions(+), 23 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 72da46d..66d10f7 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -80,10 +80,14 @@ static struct ns16550 { #endif } ns16550_com[2] = { { 0 } }; -/* Defining uart config options for MMIO devices */ struct ns16550_config_mmio { u16 vendor_id; u16 dev_id; + unsigned int param; +}; + +/* Defining uart config options for MMIO devices */ +struct ns16550_config_param { unsigned int reg_shift; unsigned int reg_width; unsigned int fifo_size; @@ -96,28 +100,27 @@ struct ns16550_config_mmio { #ifdef HAS_PCI +enum { + param_default = 0, + param_trumanage, + param_oxford, +}; /* * Create lookup tables for specific MMIO devices.. * It is assumed that if the device found is MMIO, * then you have indexed it here. Else, the driver * does nothing. */ -static struct ns16550_config_mmio __initdata uart_config[] = -{ - /* Broadcom TruManage device */ - { - .vendor_id = 0x14e4, - .dev_id = 0x160a, +static const struct ns16550_config_param __initconst uart_param[] = { + [param_default] = { }, /* Ignored. */ + [param_trumanage] = { .reg_shift = 2, .reg_width = 1, .fifo_size = 16, .lsr_mask = (UART_LSR_THRE | UART_LSR_TEMT), .max_bars = 1, }, - /* OXPCIe952 1 Native UART */ - { - .vendor_id = 0x1415, - .dev_id = 0xc138, + [param_oxford] = { .base_baud = 4000000, .uart_offset = 0x200, .first_offset = 0x1000, @@ -128,6 +131,21 @@ static struct ns16550_config_mmio __initdata uart_config[] = .max_bars = 1, /* It can do more, but we would need more custom code.*/ } }; +static const struct ns16550_config_mmio __initconst uart_config[] = +{ + /* Broadcom TruManage device */ + { + .vendor_id = 0x14e4, + .dev_id = 0x160a, + .param = param_trumanage, + }, + /* OXPCIe952 1 Native UART */ + { + .vendor_id = 0x1415, + .dev_id = 0xc138, + .param = param_oxford, + } +}; #endif static void ns16550_delayed_resume(void *data); @@ -692,37 +710,40 @@ pci_uart_config (struct ns16550 *uart, int skip_amt, int bar_idx) size &= -size; - /* Check for quirks in uart_config lookup table */ + /* Check for params in uart_config lookup table */ for ( i = 0; i < ARRAY_SIZE(uart_config); i++) { + unsigned int p; + if ( uart_config[i].vendor_id != vendor ) continue; if ( uart_config[i].dev_id != device ) continue; + p = uart_config[i].param; /* * Force length of mmio region to be at least * 8 bytes times (1 << reg_shift) */ - if ( size < (0x8 * (1 << uart_config[i].reg_shift)) ) + if ( size < (0x8 * (1 << uart_param[p].reg_shift)) ) continue; - if ( bar_idx >= uart_config[i].max_bars ) + if ( bar_idx >= uart_param[p].max_bars ) continue; - if ( uart_config[i].fifo_size ) - uart->fifo_size = uart_config[i].fifo_size; + if ( uart_param[p].fifo_size ) + uart->fifo_size = uart_param[p].fifo_size; - uart->reg_shift = uart_config[i].reg_shift; - uart->reg_width = uart_config[i].reg_width; - uart->lsr_mask = uart_config[i].lsr_mask; + uart->reg_shift = uart_param[p].reg_shift; + uart->reg_width = uart_param[p].reg_width; + uart->lsr_mask = uart_param[p].lsr_mask; uart->io_base = ((u64)bar_64 << 32) | (bar & PCI_BASE_ADDRESS_MEM_MASK); - uart->io_base += uart_config[i].first_offset; - uart->io_base += bar_idx * uart_config[i].uart_offset; - if ( uart_config[i].base_baud ) - uart->clock_hz = uart_config[i].base_baud * 16; + uart->io_base += uart_param[p].first_offset; + uart->io_base += bar_idx * uart_param[p].uart_offset; + if ( uart_param[p].base_baud ) + uart->clock_hz = uart_param[p].base_baud * 16; /* Set device and MMIO region read only to Dom0 */ uart->enable_ro = 1; break; -- 1.7.7.6