From mboxrd@z Thu Jan 1 00:00:00 1970 From: Konrad Rzeszutek Wilk Subject: [PATCH v3 6/6] serial: Expand the PCI serial quirks for OXPCIe200 and OXPCIe952 1 Native UART Date: Wed, 12 Mar 2014 11:27:52 -0400 Message-ID: <1394638072-11331-7-git-send-email-konrad.wilk@oracle.com> References: <1394638072-11331-1-git-send-email-konrad.wilk@oracle.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WNl4H-0000tt-Fi for xen-devel@lists.xenproject.org; Wed, 12 Mar 2014 15:27:41 +0000 Received: by mail-qa0-f50.google.com with SMTP id o15so10133366qap.9 for ; Wed, 12 Mar 2014 08:27:38 -0700 (PDT) In-Reply-To: <1394638072-11331-1-git-send-email-konrad.wilk@oracle.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: andrew.cooper3@citrix.com, aravind.gopalakrishnan@amd.com, xen-devel@lists.xenproject.org, jbeulich@suse.com, keir@xen.org List-Id: xen-devel@lists.xenproject.org This covers all of the OXPCIe952 1 Native UART and OXPCIe200 1 Native UART chipsets. Signed-off-by: Konrad Rzeszutek Wilk Reviewed-by: Jan Beulich --- xen/drivers/char/ns16550.c | 174 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 174 insertions(+), 0 deletions(-) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index fd66238..429d786 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -143,8 +143,182 @@ static const struct ns16550_config_mmio __initconst uart_config[] = /* OXPCIe952 1 Native UART */ { .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc11b, + .param = param_oxford, + }, + /* OXPCIe952 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc11f, + .param = param_oxford, + }, + /* OXPCIe952 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, .dev_id = 0xc138, .param = param_oxford, + }, + /* OXPCIe952 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc13d, + .param = param_oxford, + }, + /* OXPCIe952 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc40b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc40f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc41b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc41f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc42b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc42f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc43b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc43f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc44b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc44f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc45b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc45f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc46b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc46f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc47b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc47f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc48b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc48f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc49b, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc49f, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4ab, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4af, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4bb, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4bf, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4cb, + .param = param_oxford, + }, + /* OXPCIe200 1 Native UART */ + { + .vendor_id = PCI_VENDOR_ID_OXSEMI, + .dev_id = 0xc4cf, + .param = param_oxford, } }; #endif -- 1.7.7.6