From mboxrd@z Thu Jan 1 00:00:00 1970 From: vijay.kilari@gmail.com Subject: [RFC PATCH v1 01/10] xen/arm: make secondary gic init as notifier call Date: Wed, 19 Mar 2014 19:47:02 +0530 Message-ID: <1395238631-2024-2-git-send-email-vijay.kilari@gmail.com> References: <1395238631-2024-1-git-send-email-vijay.kilari@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1395238631-2024-1-git-send-email-vijay.kilari@gmail.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian.Campbell@citrix.com, julien.grall@linaro.org, stefano.stabellini@eu.citrix.com, stefano.stabellini@citrix.com, xen-devel@lists.xen.org Cc: Prasun.Kapoor@caviumnetworks.com, Vijaya Kumar K , vijay.kilari@gmail.com List-Id: xen-devel@lists.xenproject.org From: Vijaya Kumar K make gic init for secondary cpus as notifier call instead calling directly from secondary boot for each cpu. This makes secondary gic init generic and runtime. Signed-off-by: Vijaya Kumar K --- xen/arch/arm/gic.c | 35 ++++++++++++++++++++++++++--------- xen/arch/arm/smpboot.c | 3 +-- xen/include/asm-arm/gic.h | 2 -- 3 files changed, 27 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 91a2982..4be0897 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -380,6 +381,30 @@ static void __cpuinit gic_hyp_disable(void) GICH[GICH_HCR] = 0; } +/* Set up the per-CPU parts of the GIC for a secondary CPU */ +static int __cpuinit gic_init_secondary_cpu(struct notifier_block *nfb, + unsigned long action, void *hcpu) +{ + if (action == CPU_STARTING) + { + spin_lock(&gic.lock); + gic_cpu_init(); + gic_hyp_init(); + spin_unlock(&gic.lock); + } + return NOTIFY_DONE; +} + +static struct notifier_block gic_cpu_nb = { + .notifier_call = gic_init_secondary_cpu, + .priority = 100 +}; + +static void gic_smp_init(void) +{ + register_cpu_notifier(&gic_cpu_nb); +} + int gic_irq_xlate(const u32 *intspec, unsigned int intsize, unsigned int *out_hwirq, unsigned int *out_type) @@ -469,6 +494,7 @@ void __init gic_init(void) spin_lock_init(&gic.lock); spin_lock(&gic.lock); + gic_smp_init(); gic_dist_init(); gic_cpu_init(); gic_hyp_init(); @@ -524,15 +550,6 @@ void smp_send_state_dump(unsigned int cpu) send_SGI_one(cpu, GIC_SGI_DUMP_STATE); } -/* Set up the per-CPU parts of the GIC for a secondary CPU */ -void __cpuinit gic_init_secondary_cpu(void) -{ - spin_lock(&gic.lock); - gic_cpu_init(); - gic_hyp_init(); - spin_unlock(&gic.lock); -} - /* Shut down the per-CPU GIC interface */ void gic_disable_cpu(void) { diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index a829957..765efcf 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -283,7 +283,7 @@ void __cpuinit start_secondary(unsigned long boot_phys_offset, mmu_init_secondary_cpu(); - gic_init_secondary_cpu(); + notify_cpu_starting(cpuid); init_secondary_IRQ(); @@ -297,7 +297,6 @@ void __cpuinit start_secondary(unsigned long boot_phys_offset, setup_cpu_sibling_map(cpuid); /* Run local notifiers */ - notify_cpu_starting(cpuid); wmb(); /* Now report this CPU is up */ diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index 071280b..340ef73 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -189,8 +189,6 @@ extern int gic_route_irq_to_guest(struct domain *d, extern void gic_interrupt(struct cpu_user_regs *regs, int is_fiq); /* Bring up the interrupt controller, and report # cpus attached */ extern void gic_init(void); -/* Bring up a secondary CPU's per-CPU GIC interface */ -extern void gic_init_secondary_cpu(void); /* Take down a CPU's per-CPU GIC interface */ extern void gic_disable_cpu(void); /* setup the gic virtual interface for a guest */ -- 1.7.9.5