[PATCH v3 15/16] xen/arm: Update Dom0 GIC dt node with GICv3 information

[vijay.kilari@gmail.com]

From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>

Update GIC device tree node for DOM0 with GICv3
information. GIC hw specfic device tree information
is moved to respective GIC driver.

Signed-off-by: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
---
 xen/arch/arm/domain_build.c |    9 +++------
 xen/arch/arm/gic-v2.c       |    9 +++++++++
 xen/arch/arm/gic-v3.c       |   33 +++++++++++++++++++++++++++++++++
 xen/arch/arm/gic.c          |    5 +++++
 xen/include/asm-arm/gic.h   |    4 ++++
 5 files changed, 54 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 5ca2f15..5ef08da 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -576,13 +576,10 @@ static int make_gic_node(const struct domain *d, void *fdt,
         return -FDT_ERR_XEN(ENOMEM);
 
     tmp = new_cells;
-    DPRINT("  Set Distributor Base 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
-           d->arch.vgic.dbase, d->arch.vgic.dbase + PAGE_SIZE - 1);
-    dt_set_range(&tmp, node, d->arch.vgic.dbase, PAGE_SIZE);
 
-    DPRINT("  Set Cpu Base 0x%"PRIpaddr"-0x%"PRIpaddr"\n",
-           d->arch.vgic.cbase, d->arch.vgic.cbase + (PAGE_SIZE * 2) - 1);
-    dt_set_range(&tmp, node, d->arch.vgic.cbase, PAGE_SIZE * 2);
+    res = gic_make_node(d, node, fdt, tmp);
+    if ( res )
+        return res;
 
     res = fdt_property(fdt, "reg", new_cells, len);
     xfree(new_cells);
diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c
index 1e62dd9..cacb9e4 100644
--- a/xen/arch/arm/gic-v2.c
+++ b/xen/arch/arm/gic-v2.c
@@ -487,6 +487,14 @@ static unsigned int gicv2_read_vmcr_priority(void)
    return (GICH[GICH_VMCR] >> GICH_VMCR_PRIORITY_SHIFT) & GICH_VMCR_PRIORITY_MASK;
 }
 
+int static gicv3_make_dt_node(const struct domain *d,
+              const struct dt_device_node *node, void *fdt, __be32 *cells)
+{
+    dt_set_range(&cells, node, d->arch.vgic.dbase, PAGE_SIZE);
+    dt_set_range(&cells, node, d->arch.vgic.cbase, PAGE_SIZE * 2);
+    return 0;
+}
+
 static hw_irq_controller irq_ops = {
     .enable              = gicv2_enable_irq,
     .disable             = gicv2_disable_irq,
@@ -512,6 +520,7 @@ static struct gic_hw_operations gic_ops = {
     .read_lr             = gicv2_read_lr,
     .write_lr            = gicv2_write_lr,
     .read_vmcr_priority  = gicv2_read_vmcr_priority,
+    .make_dt_node        = gicv3_make_dt_node,
 };
 
 static const char * const gicv2_dt_compat[] __initconst =
diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
index 8625e0c..e27b094 100644
--- a/xen/arch/arm/gic-v3.c
+++ b/xen/arch/arm/gic-v3.c
@@ -30,6 +30,7 @@
 #include <xen/softirq.h>
 #include <xen/list.h>
 #include <xen/device_tree.h>
+#include <xen/libfdt/libfdt.h>
 #include <xen/delay.h>
 #include <asm/p2m.h>
 #include <asm/domain.h>
@@ -825,6 +826,37 @@ static unsigned int gicv3_read_vmcr_priority(void)
             GICH_VMCR_PRIORITY_MASK);
 }
 
+int static gicv3_make_dt_node(const struct domain *d,
+              const struct dt_device_node *node, void *fdt, __be32 *cells)
+{
+    uint32_t rd_stride = 0;
+    uint32_t rd_count = 0;
+    int res, i;
+
+    const struct dt_device_node *gic = dt_interrupt_controller;
+    res = dt_property_read_u32(gic, "redistributor-stride", &rd_stride);
+    if ( !res )
+        rd_stride = 0;
+
+    res = dt_property_read_u32(gic, "#redistributor-regions", &rd_count);
+    if ( !res )
+        rd_count = 1;
+
+    res = fdt_property_cell(fdt, "redistributor-stride", rd_stride);
+    if ( res )
+        return res;
+
+    res = fdt_property_cell(fdt, "#redistributor-regions", rd_count);
+    if ( res )
+        return res;
+
+    dt_set_range(&cells, node, d->arch.vgic.dbase, d->arch.vgic.dbase_size);
+
+    for ( i = 0; i < d->arch.vgic.rdist_count; i++ )
+        dt_set_range(&cells, node, d->arch.vgic.rbase[i],
+                     d->arch.vgic.rbase_size[i]);
+    return 0;
+}
 static hw_irq_controller irq_ops = {
         .enable   = gicv3_enable_irq,
         .disable  = gicv3_disable_irq,
@@ -850,6 +882,7 @@ static struct gic_hw_operations gic_ops = {
     .write_lr            = gicv3_write_lr,
     .read_vmcr_priority  = gicv3_read_vmcr_priority,
     .secondary_init      = gicv3_secondary_cpu_init,
+    .make_dt_node        = gicv3_make_dt_node,
 };
 
 /* Set up the GIC */
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c
index 4a86c42..2632a0b 100644
--- a/xen/arch/arm/gic.c
+++ b/xen/arch/arm/gic.c
@@ -811,6 +811,11 @@ void __cpuinit init_maintenance_interrupt(void)
                    "irq-maintenance", NULL);
 }
 
+int gic_make_node(const struct domain *d,const struct dt_device_node *node,
+                   void *fdt, __be32 *cells)
+{
+    return gic_hw_ops->make_dt_node(d, node, fdt, cells);
+}
 /*
  * Local variables:
  * mode: C
diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
index 3c37120..e5dfcf8 100644
--- a/xen/include/asm-arm/gic.h
+++ b/xen/include/asm-arm/gic.h
@@ -211,10 +211,14 @@ struct gic_hw_operations {
     unsigned int (*read_vmcr_priority)(void);
     /* Secondary CPU init */
     void (*secondary_init)(void);
+    int (*make_dt_node)(const struct domain *d,
+              const struct dt_device_node *node, void *fdt, __be32 *cells);
 };
 
 void register_gic_ops(const struct gic_hw_operations *ops);
 extern void update_cpu_lr_mask(void);
+int gic_make_node(const struct domain *d,const struct dt_device_node *node,
+                   void *fdt, __be32 *cells);
 
 #endif /* __ASSEMBLY__ */
 #endif
-- 
1.7.9.5