From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: kevin.tian@intel.com
Cc: keir@xen.org, jun.nakajima@intel.com, andrew.cooper3@citrix.com,
eddie.dong@intel.com, donald.d.dugger@intel.com,
xen-devel@lists.xen.org, dietmar.hahn@ts.fujitsu.com,
JBeulich@suse.com, boris.ostrovsky@oracle.com,
suravee.suthikulpanit@amd.com
Subject: [PATCH v5 RESEND 02/17] VPMU: Mark context LOADED before registers are loaded
Date: Wed, 23 Apr 2014 08:50:23 -0400 [thread overview]
Message-ID: <1398257438-4994-3-git-send-email-boris.ostrovsky@oracle.com> (raw)
In-Reply-To: <1398257438-4994-1-git-send-email-boris.ostrovsky@oracle.com>
Because a PMU interrupt may be generated as soon as PMU registers are loaded (or,
more precisely, as soon as HW PMU is "armed") we don't want to delay marking
context as LOADED until after registers are loaded. Otherwise during interrupt
handling VPMU_CONTEXT_LOADED may not be set and this could be confusing.
(Technically, only SVM needs this change right now since VMX will "arm" PMU later,
during VMRUN when global control register is loaded from VMCS. However, both
AMD and Intel code will require this patch when we introduce PV VPMU).
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
---
xen/arch/x86/hvm/svm/vpmu.c | 2 ++
xen/arch/x86/hvm/vmx/vpmu_core2.c | 2 ++
xen/arch/x86/hvm/vpmu.c | 3 +--
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/hvm/svm/vpmu.c b/xen/arch/x86/hvm/svm/vpmu.c
index 66a3815..3ac7d53 100644
--- a/xen/arch/x86/hvm/svm/vpmu.c
+++ b/xen/arch/x86/hvm/svm/vpmu.c
@@ -203,6 +203,8 @@ static void amd_vpmu_load(struct vcpu *v)
return;
}
+ vpmu_set(vpmu, VPMU_CONTEXT_LOADED);
+
context_load(v);
}
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index ee26362..8aa7cb2 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -369,6 +369,8 @@ static void core2_vpmu_load(struct vcpu *v)
if ( vpmu_is_set(vpmu, VPMU_CONTEXT_LOADED) )
return;
+ vpmu_set(vpmu, VPMU_CONTEXT_LOADED);
+
__core2_vpmu_load(v);
}
diff --git a/xen/arch/x86/hvm/vpmu.c b/xen/arch/x86/hvm/vpmu.c
index 21fbaba..63765fa 100644
--- a/xen/arch/x86/hvm/vpmu.c
+++ b/xen/arch/x86/hvm/vpmu.c
@@ -211,10 +211,9 @@ void vpmu_load(struct vcpu *v)
if ( vpmu->arch_vpmu_ops && vpmu->arch_vpmu_ops->arch_vpmu_load )
{
apic_write_around(APIC_LVTPC, vpmu->hw_lapic_lvtpc);
+ /* Arch code needs to set VPMU_CONTEXT_LOADED */
vpmu->arch_vpmu_ops->arch_vpmu_load(v);
}
-
- vpmu_set(vpmu, VPMU_CONTEXT_LOADED);
}
void vpmu_initialise(struct vcpu *v)
--
1.8.3.1
next prev parent reply other threads:[~2014-04-23 12:50 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-23 12:50 [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 01/17] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-04-23 12:50 ` Boris Ostrovsky [this message]
2014-04-26 8:20 ` [PATCH v5 RESEND 02/17] VPMU: Mark context LOADED before registers are loaded Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 03/17] x86/VPMU: Minor VPMU cleanup Boris Ostrovsky
2014-04-26 8:20 ` Tian, Kevin
2014-04-28 13:52 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 04/17] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-04-26 8:20 ` Tian, Kevin
2014-04-28 14:00 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 05/17] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-04-26 8:20 ` Tian, Kevin
2014-04-28 14:05 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 06/17] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-04-26 8:20 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 07/17] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-04-26 8:21 ` Tian, Kevin
2014-04-28 9:03 ` Jan Beulich
2014-04-28 9:09 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 08/17] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-04-26 8:21 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 09/17] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-04-26 8:21 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 10/17] x86/VPMU: Initialize PMU for PV guests Boris Ostrovsky
2014-04-26 8:21 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 11/17] x86/VPMU: Add support for PMU register handling on " Boris Ostrovsky
2014-04-26 8:26 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 12/17] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-04-26 8:33 ` Tian, Kevin
2014-04-28 14:15 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 13/17] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-04-26 8:39 ` Tian, Kevin
2014-04-28 14:23 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 14/17] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-04-26 8:40 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 15/17] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-04-26 8:48 ` Tian, Kevin
2014-04-28 17:06 ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 16/17] x86/VPMU: Suport for PVH guests Boris Ostrovsky
2014-04-26 8:50 ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 17/17] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-04-26 8:52 ` Tian, Kevin
2014-04-24 9:22 ` [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Tian, Kevin
2014-04-26 8:55 ` Tian, Kevin
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