* [PATCH v3 1/3] x86/boot: Drop pre-C IDT patching
2014-05-16 19:41 [PATCH v3 0/3] x86: Improvements to trap handling Andrew Cooper
@ 2014-05-16 19:41 ` Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 2/3] x86/irqs: Move interrupt-stub generation out of C Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 3/3] x86/misc: Post cleanup Andrew Cooper
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Cooper @ 2014-05-16 19:41 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper, Keir Fraser, Jan Beulich, Tim Deegan
It is not needed now that __start_xen sets itself up with complete trap
handlers as its first action. This fixes a potential issue introduced in
c/s 7e510a7b874
"x86/boot: move some __high_start code and data into init sections"
which would leave ignore_int (in the .init section) patched into the reserved
exceptions in all IDTs.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Keir Fraser <keir@xen.org>
CC: Jan Beulich <JBeulich@suse.com>
CC: Tim Deegan <tim@xen.org>
---
xen/arch/x86/boot/x86_64.S | 56 +-------------------------------------------
xen/arch/x86/efi/boot.c | 1 -
2 files changed, 1 insertion(+), 56 deletions(-)
diff --git a/xen/arch/x86/boot/x86_64.S b/xen/arch/x86/boot/x86_64.S
index 417623f..bfbafd2 100644
--- a/xen/arch/x86/boot/x86_64.S
+++ b/xen/arch/x86/boot/x86_64.S
@@ -25,64 +25,15 @@
leaq 1f(%rip),%rax
pushq %rax
lretq
-1: lidt idt_descr(%rip)
-
+1:
test %ebx,%ebx
jnz start_secondary
- jmp start_bsp
-
- .section .init.text, "ax", @progbits
-
-start_bsp:
- /* Initialise IDT with simple error defaults. */
- leaq ignore_int(%rip),%rcx
- movl %ecx,%eax
- andl $0xFFFF0000,%eax
- orl $0x00008E00,%eax
- shlq $32,%rax
- movl %ecx,%edx
- andl $0x0000FFFF,%edx
- orl $(__HYPERVISOR_CS64<<16),%edx
- orq %rdx,%rax
- shrq $32,%rcx
- movl %ecx,%edx
- leaq idt_table(%rip),%rdi
- movl $256,%ecx
-1: movq %rax,(%rdi)
- movq %rdx,8(%rdi)
- addq $16,%rdi
- loop 1b
/* Pass off the Multiboot info structure to C land. */
mov multiboot_ptr(%rip),%edi
call __start_xen
ud2 /* Force a panic (invalid opcode). */
-/* This is the default interrupt handler. */
-ignore_int:
- SAVE_ALL CLAC
- movq %cr2,%rsi
- leaq int_msg(%rip),%rdi
- xorl %eax,%eax
- call printk
- movq %rsp,%rbp
-0: movq (%rbp),%rsi
- addq $8,%rbp
- leaq hex_msg(%rip),%rdi
- xorl %eax,%eax
- call printk
- testq $0xff8,%rbp
- jnz 0b
-1: hlt
- jmp 1b
-
- .section .init.rodata, "a", @progbits
-
-int_msg:
- .asciz "Unknown interrupt (cr2=%016lx)\n"
-hex_msg:
- .asciz " %016lx"
-
/*** DESCRIPTOR TABLES ***/
.data
@@ -95,11 +46,6 @@ GLOBAL(gdt_descr)
.word LAST_RESERVED_GDT_BYTE
.quad boot_cpu_gdt_table - FIRST_RESERVED_GDT_BYTE
- .word 0,0,0
-GLOBAL(idt_descr)
- .word 256*16-1
- .quad idt_table
-
GLOBAL(stack_start)
.quad cpu0_stack
diff --git a/xen/arch/x86/efi/boot.c b/xen/arch/x86/efi/boot.c
index 62c4812..a772509 100644
--- a/xen/arch/x86/efi/boot.c
+++ b/xen/arch/x86/efi/boot.c
@@ -1474,7 +1474,6 @@ efi_start(EFI_HANDLE ImageHandle, EFI_SYSTEM_TABLE *SystemTable)
asm volatile ( "mov %[cr4], %%cr4\n\t"
"mov %[cr3], %%cr3\n\t"
"movabs $__start_xen, %[rip]\n\t"
- "lidt idt_descr(%%rip)\n\t"
"lgdt gdt_descr(%%rip)\n\t"
"mov stack_start(%%rip), %%rsp\n\t"
"mov %[ds], %%ss\n\t"
--
1.7.10.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 2/3] x86/irqs: Move interrupt-stub generation out of C
2014-05-16 19:41 [PATCH v3 0/3] x86: Improvements to trap handling Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 1/3] x86/boot: Drop pre-C IDT patching Andrew Cooper
@ 2014-05-16 19:41 ` Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 3/3] x86/misc: Post cleanup Andrew Cooper
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Cooper @ 2014-05-16 19:41 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper, Feng Wu, Keir Fraser, Jan Beulich, Tim Deegan
In addition, generate stubs for reserved exceptions. These go through the
standard handle_exception mechanism, although the C handler do_reserved_trap()
is a terminal error path.
* Move all automatic stub generation out of i8259.c and into entry.S.
* Move patching of the master IDT into trap_init(). Provide ASSERT()s to
ensure we have fully populated the IDT and don't accidentally clobbered any
preexisting traps.
* Demote TRAP_copro_seg and TRAP_spurious_int to being reserved exceptions
and remove their custom entry points.
* Point double_fault's exception_table entry at do_reserved_trap. We do not
ever expect to enter a real double fault this way.
* Acquaint Xen with #VE but leave it reserved.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Keir Fraser <keir@xen.org>
CC: Jan Beulich <JBeulich@suse.com>
CC: Tim Deegan <tim@xen.org>
CC: Feng Wu <feng.wu@intel.com>
---
v3:
* Reuse exiting handle_exception infrastructure.
* Autogenerate in entry.S rather than adding the new file irqgen.S
* Test whether the processor pushed an error code or not for the
automatically generated stubs. This was tested using "int $0x1f" and
observing a properly aligned register dump.
v2:
* Far less .macro hackary, inspired by Feng's patch of a similar nature. On
consideration, having literal symbol names is very little use, either in
the disassembly, or running hypervisor. In hindsight this is new version is
substantially more likely to compile under clang, although I don't have a
compiler to hand.
---
xen/arch/x86/i8259.c | 69 +--------------------------------------
xen/arch/x86/traps.c | 36 +++++++++++++++-----
xen/arch/x86/x86_64/entry.S | 67 +++++++++++++++++++++++++++++--------
xen/include/asm-x86/asm_defns.h | 5 ---
xen/include/asm-x86/processor.h | 4 +--
5 files changed, 85 insertions(+), 96 deletions(-)
diff --git a/xen/arch/x86/i8259.c b/xen/arch/x86/i8259.c
index 9fec490..9f99995 100644
--- a/xen/arch/x86/i8259.c
+++ b/xen/arch/x86/i8259.c
@@ -23,65 +23,6 @@
#include <io_ports.h>
/*
- * Common place to define all x86 IRQ vectors
- *
- * This builds up the IRQ handler stubs using some ugly macros in irq.h
- *
- * These macros create the low-level assembly IRQ routines that save
- * register context and call do_IRQ(). do_IRQ() then does all the
- * operations that are needed to keep the AT (or SMP IOAPIC)
- * interrupt-controller happy.
- */
-
-__asm__(".section .text");
-
-#define IRQ_NAME(nr) VEC##nr##_interrupt
-
-#define BI(nr) \
-void IRQ_NAME(nr)(void); \
-__asm__( \
-".if " STR(0x##nr) " >= " STR(FIRST_DYNAMIC_VECTOR) "\n" \
-__ALIGN_STR "\n" \
-STR(IRQ_NAME(nr)) ":\n\t" \
-BUILD_IRQ(0x##nr) "\n" \
-".else\n" \
-".equ " STR(IRQ_NAME(nr)) ", 0\n" \
-".endif\n")
-
-#define BUILD_16_IRQS(x) \
- BI(x##0); BI(x##1); BI(x##2); BI(x##3); \
- BI(x##4); BI(x##5); BI(x##6); BI(x##7); \
- BI(x##8); BI(x##9); BI(x##a); BI(x##b); \
- BI(x##c); BI(x##d); BI(x##e); BI(x##f)
-
-BUILD_16_IRQS(0); BUILD_16_IRQS(1); BUILD_16_IRQS(2); BUILD_16_IRQS(3);
-BUILD_16_IRQS(4); BUILD_16_IRQS(5); BUILD_16_IRQS(6); BUILD_16_IRQS(7);
-BUILD_16_IRQS(8); BUILD_16_IRQS(9); BUILD_16_IRQS(a); BUILD_16_IRQS(b);
-BUILD_16_IRQS(c); BUILD_16_IRQS(d); BUILD_16_IRQS(e); BUILD_16_IRQS(f);
-
-#undef BUILD_16_IRQS
-#undef BI
-
-
-#define IRQ(x,y) IRQ_NAME(x##y)
-
-#define IRQLIST_16(x) \
- IRQ(x,0), IRQ(x,1), IRQ(x,2), IRQ(x,3), \
- IRQ(x,4), IRQ(x,5), IRQ(x,6), IRQ(x,7), \
- IRQ(x,8), IRQ(x,9), IRQ(x,a), IRQ(x,b), \
- IRQ(x,c), IRQ(x,d), IRQ(x,e), IRQ(x,f)
-
-static void (*__initdata interrupt[NR_VECTORS])(void) = {
- IRQLIST_16(0), IRQLIST_16(1), IRQLIST_16(2), IRQLIST_16(3),
- IRQLIST_16(4), IRQLIST_16(5), IRQLIST_16(6), IRQLIST_16(7),
- IRQLIST_16(8), IRQLIST_16(9), IRQLIST_16(a), IRQLIST_16(b),
- IRQLIST_16(c), IRQLIST_16(d), IRQLIST_16(e), IRQLIST_16(f)
-};
-
-#undef IRQ
-#undef IRQLIST_16
-
-/*
* This is the 'legacy' 8259A Programmable Interrupt Controller,
* present in the majority of PC/AT boxes.
* plus some generic x86 specific things if generic specifics makes
@@ -395,7 +336,7 @@ static struct irqaction __read_mostly cascade = { no_action, "cascade", NULL};
void __init init_IRQ(void)
{
- int vector, irq, cpu = smp_processor_id();
+ int irq, cpu = smp_processor_id();
init_bsp_APIC();
@@ -403,14 +344,6 @@ void __init init_IRQ(void)
BUG_ON(init_irq_data() < 0);
- for ( vector = FIRST_DYNAMIC_VECTOR; vector < NR_VECTORS; vector++ )
- {
- if (vector == HYPERCALL_VECTOR || vector == LEGACY_SYSCALL_VECTOR)
- continue;
- BUG_ON(!interrupt[vector]);
- set_intr_gate(vector, interrupt[vector]);
- }
-
for (irq = 0; platform_legacy_irq(irq); irq++) {
struct irq_desc *desc = irq_to_desc(irq);
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 136821f..8863334 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -383,7 +383,7 @@ static const char *trapstr(unsigned int trapnr)
"coprocessor segment", "invalid tss", "segment not found",
"stack error", "general protection fault", "page fault",
"spurious interrupt", "coprocessor error", "alignment check",
- "machine check", "simd error"
+ "machine check", "simd error", "virtualisation exception"
};
return trapnr < ARRAY_SIZE(strings) ? strings[trapnr] : "???";
@@ -534,6 +534,15 @@ int set_guest_nmi_trapbounce(void)
return !null_trap_bounce(v, tb);
}
+void do_reserved_trap(struct cpu_user_regs *regs)
+{
+ unsigned int trapnr = regs->entry_vector;
+
+ DEBUGGER_trap_fatal(trapnr, regs);
+ show_execution_state(regs);
+ panic("FATAL RESERVED TRAP %#x: %s", trapnr, trapstr(trapnr));
+}
+
static void do_trap(struct cpu_user_regs *regs, int use_error_code)
{
struct vcpu *curr = current;
@@ -589,7 +598,6 @@ void do_##name(struct cpu_user_regs *regs) \
DO_ERROR_NOCODE(divide_error)
DO_ERROR_NOCODE(overflow)
DO_ERROR_NOCODE(bounds)
-DO_ERROR_NOCODE(coprocessor_segment_overrun)
DO_ERROR( invalid_TSS)
DO_ERROR( segment_not_present)
DO_ERROR( stack_segment)
@@ -3414,10 +3422,6 @@ void do_debug(struct cpu_user_regs *regs)
return;
}
-void do_spurious_interrupt_bug(struct cpu_user_regs *regs)
-{
-}
-
static void __set_intr_gate(unsigned int n, uint32_t dpl, void *addr)
{
int i;
@@ -3516,13 +3520,11 @@ void __init init_idt_traps(void)
set_intr_gate(TRAP_invalid_op,&invalid_op);
set_intr_gate(TRAP_no_device,&device_not_available);
set_intr_gate(TRAP_double_fault,&double_fault);
- set_intr_gate(TRAP_copro_seg,&coprocessor_segment_overrun);
set_intr_gate(TRAP_invalid_tss,&invalid_TSS);
set_intr_gate(TRAP_no_segment,&segment_not_present);
set_intr_gate(TRAP_stack_error,&stack_segment);
set_intr_gate(TRAP_gp_fault,&general_protection);
set_intr_gate(TRAP_page_fault,&early_page_fault);
- set_intr_gate(TRAP_spurious_int,&spurious_interrupt_bug);
set_intr_gate(TRAP_copro_error,&coprocessor_error);
set_intr_gate(TRAP_alignment_check,&alignment_check);
set_intr_gate(TRAP_machine_check,&machine_check);
@@ -3540,8 +3542,11 @@ void __init init_idt_traps(void)
this_cpu(compat_gdt_table) = boot_cpu_compat_gdt_table;
}
+extern void (*__initconst autogen_entrypoints[NR_VECTORS])(void);
void __init trap_init(void)
{
+ unsigned int vector;
+
/* Replace early pagefault with real pagefault handler. */
set_intr_gate(TRAP_page_fault, &page_fault);
@@ -3552,6 +3557,21 @@ void __init trap_init(void)
/* Fast trap for int80 (faster than taking the #GP-fixup path). */
_set_gate(idt_table + 0x80, SYS_DESC_trap_gate, 3, &int80_direct_trap);
+ for ( vector = 0; vector < NR_VECTORS; ++vector )
+ {
+ if ( autogen_entrypoints[vector] )
+ {
+ /* Found autogen entry: check we won't clobber an existing trap. */
+ ASSERT(idt_table[vector].b == 0);
+ set_intr_gate(vector, autogen_entrypoints[vector]);
+ }
+ else
+ {
+ /* No entry point: confirm we have an existing trap in place. */
+ ASSERT(idt_table[vector].b != 0);
+ }
+ }
+
percpu_traps_init();
cpu_init();
diff --git a/xen/arch/x86/x86_64/entry.S b/xen/arch/x86/x86_64/entry.S
index 4796e65..5d693fc 100644
--- a/xen/arch/x86/x86_64/entry.S
+++ b/xen/arch/x86/x86_64/entry.S
@@ -586,11 +586,6 @@ ENTRY(invalid_op)
movl $TRAP_invalid_op,4(%rsp)
jmp handle_exception
-ENTRY(coprocessor_segment_overrun)
- pushq $0
- movl $TRAP_copro_seg,4(%rsp)
- jmp handle_exception
-
ENTRY(invalid_TSS)
movl $TRAP_invalid_tss,4(%rsp)
jmp handle_exception
@@ -611,11 +606,6 @@ ENTRY(alignment_check)
movl $TRAP_alignment_check,4(%rsp)
jmp handle_exception
-ENTRY(spurious_interrupt_bug)
- pushq $0
- movl $TRAP_spurious_int,4(%rsp)
- jmp handle_exception
-
ENTRY(double_fault)
movl $TRAP_double_fault,4(%rsp)
/* Set AC to reduce chance of further SMAP faults */
@@ -716,18 +706,21 @@ ENTRY(exception_table)
.quad do_bounds
.quad do_invalid_op
.quad do_device_not_available
- .quad 0 # double_fault
- .quad do_coprocessor_segment_overrun
+ .quad do_reserved_trap /* double_fault - has its own entry. */
+ .quad do_reserved_trap /* coproc_seg_overrun - Intel 387 only. */
.quad do_invalid_TSS
.quad do_segment_not_present
.quad do_stack_segment
.quad do_general_protection
.quad do_page_fault
- .quad do_spurious_interrupt_bug
+ .quad do_reserved_trap /* Default PIC spurious irq - architecturally reserved. */
.quad do_coprocessor_error
.quad do_alignment_check
.quad do_machine_check
.quad do_simd_coprocessor_error
+ .rept TRAP_last_reserved + 1 - ((. - exception_table) / 8)
+ .quad do_reserved_trap /* Architecturally reserved exceptions. */
+ .endr
ENTRY(hypercall_table)
.quad do_set_trap_table /* 0 */
@@ -824,3 +817,51 @@ ENTRY(hypercall_args_table)
.rept NR_hypercalls-(.-hypercall_args_table)
.byte 0 /* do_ni_hypercall */
.endr
+
+/* Table of automatically generated entry points. One per vector. */
+.section ".init.rodata", "a"
+GLOBAL(autogen_entrypoints)
+ /* pop into the .init.rodata section and record an entry point. */
+ .macro entrypoint ent
+ .pushsection ".init.rodata", "a"
+ .quad \ent
+ .popsection
+ .endm
+
+.text
+autogen_stubs: /* Automatically generated stubs. */
+
+ vec = 0
+ .rept NR_VECTORS
+ ALIGN
+
+ /* Common interrupts, heading towards do_IRQ(). */
+ .if vec >= FIRST_DYNAMIC_VECTOR && vec != HYPERCALL_VECTOR && vec != LEGACY_SYSCALL_VECTOR
+
+1: pushq $0
+ movb $vec,4(%rsp)
+ jmp common_interrupt
+
+ entrypoint 1b
+
+ /* Reserved exceptions, heading towards do_reserved_trap(). */
+ .elseif vec == TRAP_copro_seg || vec == TRAP_spurious_int || (vec > TRAP_simd_error && vec <= TRAP_last_reserved)
+
+1: test $0x8,%sp /* 64bit exception frames are 16 byte aligned, but the word */
+ jz 2f /* size is 8 bytes. Check whether the processor gave us an */
+ pushq $0 /* error code, and insert an empty one if not. */
+2: movb $vec,4(%rsp)
+ jmp handle_exception
+
+ entrypoint 1b
+
+ /* Hand crafted entry points above. */
+ .else
+ entrypoint 0
+ .endif
+
+ vec = vec + 1
+ .endr
+
+ .section ".init.rodata", "a"
+ .size autogen_entrypoints, . - autogen_entrypoints
diff --git a/xen/include/asm-x86/asm_defns.h b/xen/include/asm-x86/asm_defns.h
index df4873b..87a462f 100644
--- a/xen/include/asm-x86/asm_defns.h
+++ b/xen/include/asm-x86/asm_defns.h
@@ -357,9 +357,4 @@ static inline void stac(void)
#define REX64_PREFIX "rex64/"
#endif
-#define BUILD_IRQ(nr) \
- "pushq $0\n\t" \
- "movl $"#nr",4(%rsp)\n\t" \
- "jmp common_interrupt"
-
#endif /* __X86_ASM_DEFNS_H__ */
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index 805ec34..4a60eb0 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -113,6 +113,7 @@
#define TRAP_alignment_check 17
#define TRAP_machine_check 18
#define TRAP_simd_error 19
+#define TRAP_virtualisation 20
#define TRAP_last_reserved 31
/* Set for entry via SYSCALL. Informs return code to use SYSRETQ not IRETQ. */
@@ -503,7 +504,6 @@ DECLARE_TRAP_HANDLER(bounds);
DECLARE_TRAP_HANDLER(invalid_op);
DECLARE_TRAP_HANDLER(device_not_available);
DECLARE_TRAP_HANDLER(double_fault);
-DECLARE_TRAP_HANDLER(coprocessor_segment_overrun);
DECLARE_TRAP_HANDLER(invalid_TSS);
DECLARE_TRAP_HANDLER(segment_not_present);
DECLARE_TRAP_HANDLER(stack_segment);
@@ -514,12 +514,12 @@ DECLARE_TRAP_HANDLER(coprocessor_error);
DECLARE_TRAP_HANDLER(simd_coprocessor_error);
DECLARE_TRAP_HANDLER(machine_check);
DECLARE_TRAP_HANDLER(alignment_check);
-DECLARE_TRAP_HANDLER(spurious_interrupt_bug);
#undef DECLARE_TRAP_HANDLER
void trap_nop(void);
void enable_nmis(void);
void noreturn do_nmi_crash(struct cpu_user_regs *regs);
+void do_reserved_trap(struct cpu_user_regs *regs);
void syscall_enter(void);
void sysenter_entry(void);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v3 3/3] x86/misc: Post cleanup
2014-05-16 19:41 [PATCH v3 0/3] x86: Improvements to trap handling Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 1/3] x86/boot: Drop pre-C IDT patching Andrew Cooper
2014-05-16 19:41 ` [PATCH v3 2/3] x86/irqs: Move interrupt-stub generation out of C Andrew Cooper
@ 2014-05-16 19:41 ` Andrew Cooper
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Cooper @ 2014-05-16 19:41 UTC (permalink / raw)
To: Xen-devel; +Cc: Andrew Cooper, Keir Fraser, Jan Beulich, Tim Deegan
* panic() now works on early boot. Replace EARLY_FAIL()
* Cleanup __set_intr_gate() & friends. The master IDT is fully constructed on
early boot, and only subsequently altered on the crash path. Make them
private to traps.c, move them into .init, and remove the loop over all idts,
as __set_intr_gate() will never find an AP to patch. (For some reason,
leaving out the noinline causes ~1.5k of code bloat from GCC inlining
everything)
* No need to clear X86_EFLAGS_NT in cpu_init(). This is covered by the eflags
reset in __high_start().
* Missing '\n' from unexpected MCE printk.
* load_system_tables() is x86 specific. Move its declaration into an x86 header.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Keir Fraser <keir@xen.org>
CC: Jan Beulich <JBeulich@suse.com>
CC: Tim Deegan <tim@xen.org>
---
v3:
* Missing '\n' from printk.
* Move load_system_tables() into x86 header.
v2:
* Don't page align idt_table.
* Forgo clearing NT.
---
xen/arch/x86/cpu/common.c | 3 ---
xen/arch/x86/cpu/mcheck/mce.c | 2 +-
xen/arch/x86/setup.c | 20 ++++++--------------
xen/arch/x86/traps.c | 11 +++--------
xen/include/asm-x86/desc.h | 1 -
xen/include/asm-x86/system.h | 1 +
xen/include/xen/sched.h | 1 -
7 files changed, 11 insertions(+), 28 deletions(-)
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index dcd2ca1..18112f2 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -593,9 +593,6 @@ void __cpuinit cpu_init(void)
/* Install correct page table. */
write_ptbase(current);
- /* No nested task. */
- asm volatile ("pushf ; andw $0xbfff,(%"__OP"sp) ; popf" );
-
/* Ensure FPU gets initialised for each domain. */
stts();
diff --git a/xen/arch/x86/cpu/mcheck/mce.c b/xen/arch/x86/cpu/mcheck/mce.c
index 5488411..c6e3092 100644
--- a/xen/arch/x86/cpu/mcheck/mce.c
+++ b/xen/arch/x86/cpu/mcheck/mce.c
@@ -73,7 +73,7 @@ custom_param("mce_verbosity", mce_set_verbosity);
static void unexpected_machine_check(struct cpu_user_regs *regs, long error_code)
{
console_force_unlock();
- printk("Unexpected Machine Check Exception");
+ printk("Unexpected Machine Check Exception\n");
fatal_trap(TRAP_machine_check, regs);
}
diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c
index b2a808a..508649d 100644
--- a/xen/arch/x86/setup.c
+++ b/xen/arch/x86/setup.c
@@ -133,11 +133,6 @@ static void __init parse_acpi_param(char *s)
}
}
-#define EARLY_FAIL(f, a...) do { \
- printk( f , ## a ); \
- for ( ; ; ) halt(); \
-} while (0)
-
static const module_t *__initdata initial_images;
static unsigned int __initdata nr_initial_images;
@@ -669,11 +664,10 @@ void __init noreturn __start_xen(unsigned long mbi_p)
/* Check that we have at least one Multiboot module. */
if ( !(mbi->flags & MBI_MODULES) || (mbi->mods_count == 0) )
- EARLY_FAIL("dom0 kernel not specified. "
- "Check bootloader configuration.\n");
+ panic("dom0 kernel not specified. Check bootloader configuration.");
if ( ((unsigned long)cpu0_stack & (STACK_SIZE-1)) != 0 )
- EARLY_FAIL("Misaligned CPU0 stack.\n");
+ panic("Misaligned CPU0 stack.");
if ( efi_enabled )
{
@@ -754,9 +748,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
e820_raw_nr = 2;
}
else
- {
- EARLY_FAIL("Bootloader provided no memory information.\n");
- }
+ panic("Bootloader provided no memory information.");
/* Sanitise the raw E820 map to produce a final clean version. */
max_page = raw_max_page = init_e820(memmap_type, e820_raw, &e820_raw_nr);
@@ -791,7 +783,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
for ( i = 0; !efi_enabled && i < mbi->mods_count; i++ )
{
if ( mod[i].mod_start & (PAGE_SIZE - 1) )
- EARLY_FAIL("Bootloader didn't honor module alignment request.\n");
+ panic("Bootloader didn't honor module alignment request.");
mod[i].mod_end -= mod[i].mod_start;
mod[i].mod_start >>= PAGE_SHIFT;
mod[i].reserved = 0;
@@ -964,7 +956,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
}
if ( modules_headroom && !mod->reserved )
- EARLY_FAIL("Not enough memory to relocate the dom0 kernel image.\n");
+ panic("Not enough memory to relocate the dom0 kernel image.");
for ( i = 0; i < mbi->mods_count; ++i )
{
uint64_t s = (uint64_t)mod[i].mod_start << PAGE_SHIFT;
@@ -973,7 +965,7 @@ void __init noreturn __start_xen(unsigned long mbi_p)
}
if ( !xen_phys_start )
- EARLY_FAIL("Not enough memory to relocate Xen.\n");
+ panic("Not enough memory to relocate Xen.");
reserve_e820_ram(&boot_e820, efi_enabled ? mbi->mem_upper : __pa(&_start),
__pa(&_end));
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 8863334..1722912 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -3422,22 +3422,17 @@ void do_debug(struct cpu_user_regs *regs)
return;
}
-static void __set_intr_gate(unsigned int n, uint32_t dpl, void *addr)
+static void __init noinline __set_intr_gate(unsigned int n, uint32_t dpl, void *addr)
{
- int i;
- /* Keep secondary tables in sync with IRQ updates. */
- for ( i = 1; i < nr_cpu_ids; i++ )
- if ( idt_tables[i] != NULL )
- _set_gate(&idt_tables[i][n], SYS_DESC_irq_gate, dpl, addr);
_set_gate(&idt_table[n], SYS_DESC_irq_gate, dpl, addr);
}
-static void set_swint_gate(unsigned int n, void *addr)
+static void __init set_swint_gate(unsigned int n, void *addr)
{
__set_intr_gate(n, 3, addr);
}
-void set_intr_gate(unsigned int n, void *addr)
+static void __init set_intr_gate(unsigned int n, void *addr)
{
__set_intr_gate(n, 0, addr);
}
diff --git a/xen/include/asm-x86/desc.h b/xen/include/asm-x86/desc.h
index 8257167..225913a 100644
--- a/xen/include/asm-x86/desc.h
+++ b/xen/include/asm-x86/desc.h
@@ -199,7 +199,6 @@ DECLARE_PER_CPU(struct desc_struct *, gdt_table);
extern struct desc_struct boot_cpu_compat_gdt_table[];
DECLARE_PER_CPU(struct desc_struct *, compat_gdt_table);
-extern void set_intr_gate(unsigned int irq, void * addr);
extern void load_TR(void);
#endif /* !__ASSEMBLY__ */
diff --git a/xen/include/asm-x86/system.h b/xen/include/asm-x86/system.h
index c5e482a..7111329 100644
--- a/xen/include/asm-x86/system.h
+++ b/xen/include/asm-x86/system.h
@@ -180,6 +180,7 @@ static inline int local_irq_is_enabled(void)
void trap_init(void);
void init_idt_traps(void);
+void load_system_tables(void);
void percpu_traps_init(void);
void subarch_percpu_traps_init(void);
diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index acbe117..44851ae 100644
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -770,7 +770,6 @@ void domain_unpause(struct domain *d);
void domain_pause_by_systemcontroller(struct domain *d);
void domain_unpause_by_systemcontroller(struct domain *d);
void cpu_init(void);
-void load_system_tables(void);
struct scheduler;
--
1.7.10.4
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