From mboxrd@z Thu Jan 1 00:00:00 1970 From: vijay.kilari@gmail.com Subject: [PATCH v2 0/3] xen/arm: Add stage 2 48-bit PA support Date: Tue, 27 May 2014 12:16:43 +0530 Message-ID: <1401173206-4634-1-git-send-email-vijay.kilari@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian.Campbell@citrix.com, julien.grall@linaro.org, stefano.stabellini@eu.citrix.com, stefano.stabellini@citrix.com, xen-devel@lists.xen.org Cc: Prasun.Kapoor@caviumnetworks.com, Vijaya Kumar K , vijay.kilari@gmail.com List-Id: xen-devel@lists.xenproject.org From: Vijaya Kumar K Add 4-level page tables for stage 2 translation to support 48-bit physical address range. Changes in v2: - Moved VTCR register declarations from page.h to processor.h file - Fixed coding style comments - Added patch(2) to handle page table walk with 4 levels - Added seperate patch to remove unused VADDR{BITS,MASK} macros Changes in v1: - Initial version Vijaya Kumar K (3): xen/arm: Add 4-level page table for stage 2 translation xen/arm: update page table walk to handle 4 level page table xen/arm: remove unused VADDR_BITS and VADDR_MASK macros xen/arch/arm/arm64/head.S | 14 ++-- xen/arch/arm/mm.c | 37 +++++++---- xen/arch/arm/p2m.c | 136 +++++++++++++++++++++++++++++++++------ xen/include/asm-arm/p2m.h | 5 +- xen/include/asm-arm/page.h | 19 +++--- xen/include/asm-arm/processor.h | 102 ++++++++++++++++++++++++++++- 6 files changed, 265 insertions(+), 48 deletions(-) -- 1.7.9.5