From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: [PATCH 5/5] hvmloader/tests: Introduce WRFSBASE test Date: Tue, 29 Jul 2014 15:30:01 +0100 Message-ID: <1406644201-9850-6-git-send-email-andrew.cooper3@citrix.com> References: <1406644201-9850-1-git-send-email-andrew.cooper3@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1406644201-9850-1-git-send-email-andrew.cooper3@citrix.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Xen-devel Cc: Keir Fraser , Ian Campbell , Andrew Cooper , Ian Jackson , Tim Deegan , Jan Beulich List-Id: xen-devel@lists.xenproject.org Without the bugfix in c/s , the first move to cr4 may fail despite the feature being advertised. Signed-off-by: Andrew Cooper CC: Keir Fraser CC: Jan Beulich CC: Tim Deegan CC: Ian Campbell CC: Ian Jackson --- If this patch is acceptable, could the committer insert an appropriate reference to patch 2 above? --- tools/firmware/hvmloader/tests.c | 66 +++++++++++++++++++++++++++++++++++++- 1 file changed, 65 insertions(+), 1 deletion(-) diff --git a/tools/firmware/hvmloader/tests.c b/tools/firmware/hvmloader/tests.c index 37d16f8..a30e738 100644 --- a/tools/firmware/hvmloader/tests.c +++ b/tools/firmware/hvmloader/tests.c @@ -192,6 +192,70 @@ static int shadow_gs_test(void) return (ebx == 2) ? TEST_PASS : TEST_FAIL; } +static int wrfsbase_test(void) +{ + uint64_t *pd = (uint64_t *)PD_START; + uint32_t i, eax, ebx, ecx, edx; + + /* Skip this test if the CPU does not support long mode. */ + cpuid(0x80000000, &eax, &ebx, &ecx, &edx); + if ( eax < 0x80000001 ) + return TEST_SKIP; + cpuid(0x80000001, &eax, &ebx, &ecx, &edx); + if ( !(edx & (1u<<29)) ) + return TEST_SKIP; + /* Skip this test if the CPU does not support fsgsbase. */ + cpuid(0, &eax, &ebx, &ecx, &edx); + if ( eax < 7 ) + return TEST_SKIP; + cpuid_count(7, 0, &eax, &ebx, &ecx, &edx); + if ( !(ebx & (1u<<0)) ) + return TEST_SKIP; + + /* Long mode pagetable setup: Identity map 0-16MB with 2MB mappings. */ + *pd = (unsigned long)pd + 0x1007; /* Level 4 */ + pd += 512; + *pd = (unsigned long)pd + 0x1007; /* Level 3 */ + pd += 512; + for ( i = 0; i < 8; i++ ) /* Level 2 */ + *pd++ = (i << 21) + 0x1e3; + + asm volatile ( + /* CR4.{FSGSBASE,PAE}=1 */ + "mov $0x10020,%%ebx; " + "mov %%ebx,%%cr4; " + /* CR3 */ + "mov %%eax,%%cr3; " + /* EFER.LME=1 */ + "mov $0xc0000080,%%ecx; rdmsr; btsl $8,%%eax; wrmsr; " + /* CR0.PG=1 */ + "mov %%cr0,%%eax; btsl $31,%%eax; mov %%eax,%%cr0; " + "jmp 1f; 1: " + /* Push LRETQ stack frame. */ + "pushl $0; pushl $"STR(SEL_CODE32)"; pushl $0; pushl $2f; " + /* Jump to 64-bit mode. */ + "ljmp $"STR(SEL_CODE64)",$1f; " + ".code64; 1: " + "movl $0x234,%%eax; " + ".byte 0xf3, 0x48, 0x0f, 0xae, 0xd0; " /* WRFSBASE %rax */ + /* Jump to 32-bit mode. */ + "movl %%esp,%%esp; " + "lretq; " + ".code32; 2:" + /* Read FS_BASE: should now contain 0x234 */ + "mov $0xc0000100,%%ecx; rdmsr; mov %%eax,%%ebx; " + /* CR0.PG=0 */ + "mov %%cr0,%%eax; btcl $31,%%eax; mov %%eax,%%cr0; " + "jmp 1f; 1:" + /* EFER.LME=0 */ + "mov $0xc0000080,%%ecx; rdmsr; btcl $8,%%eax; wrmsr; " + /* CR4.PAE=0 */ + "xor %%eax,%%eax; mov %%eax,%%cr4; " + : "=b" (ebx) : "a" (PD_START) : "ecx", "edx", "memory" ); + + return (ebx == 0x234) ? TEST_PASS : TEST_FAIL; +} + void perform_tests(void) { int i, passed, skipped; @@ -202,6 +266,7 @@ void perform_tests(void) } tests[] = { { rep_io_test, "REP INSB across page boundaries" }, { shadow_gs_test, "GS base MSRs and SWAPGS" }, + { wrfsbase_test, "FS base MSR and WRFSBASE" }, { NULL, NULL } }; @@ -244,7 +309,6 @@ void perform_tests(void) BUG(); } } - /* * Local variables: * mode: C -- 1.7.10.4