From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: jbeulich@suse.com, kevin.tian@intel.com,
suravee.suthikulpanit@amd.com, eddie.dong@intel.com,
Aravind.Gopalakrishnan@amd.com
Cc: keir@xen.org, andrew.cooper3@citrix.com, tim@xen.org,
xen-devel@lists.xen.org, jun.nakajima@intel.com,
boris.ostrovsky@oracle.com
Subject: [PATCH v10 19/20] x86/VPMU: NMI-based VPMU support
Date: Wed, 3 Sep 2014 23:41:19 -0400 [thread overview]
Message-ID: <1409802080-6160-20-git-send-email-boris.ostrovsky@oracle.com> (raw)
In-Reply-To: <1409802080-6160-1-git-send-email-boris.ostrovsky@oracle.com>
Add support for using NMIs as PMU interrupts.
Most of processing is still performed by vpmu_do_interrupt(). However, since
certain operations are not NMI-safe we defer them to a softint that vpmu_do_interrupt()
will schedule:
* For PV guests that would be send_guest_vcpu_virq()
* For HVM guests it's VLAPIC accesses and hvm_get_segment_register() (the later
can be called in privileged profiling mode when the interrupted guest is an HVM one).
With send_guest_vcpu_virq() and hvm_get_segment_register() for PV(H) and vlapic
accesses for HVM moved to sofint, the only routines/macros that vpmu_do_interrupt()
calls in NMI mode are:
* memcpy()
* querying domain type (is_XX_domain())
* guest_cpu_user_regs()
* XLAT_cpu_user_regs()
* raise_softirq()
* vcpu_vpmu()
* vpmu_ops->arch_vpmu_save()
* vpmu_ops->do_interrupt() (in the future for PVH support)
The latter two only access PMU MSRs with {rd,wr}msrl() (not the _safe versions
which would not be NMI-safe).
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Kevin Tian <kevint.tian@intel.com>
Reviewed-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
Tested-by: Dietmar Hahn <dietmar.hahn@ts.fujitsu.com>
---
xen/arch/x86/hvm/svm/vpmu.c | 3 +-
xen/arch/x86/hvm/vmx/vpmu_core2.c | 3 +-
xen/arch/x86/hvm/vpmu.c | 195 +++++++++++++++++++++++++++++++-------
xen/include/asm-x86/hvm/vpmu.h | 4 +-
xen/include/xen/softirq.h | 1 +
5 files changed, 166 insertions(+), 40 deletions(-)
diff --git a/xen/arch/x86/hvm/svm/vpmu.c b/xen/arch/x86/hvm/svm/vpmu.c
index 055b21c..9db0559 100644
--- a/xen/arch/x86/hvm/svm/vpmu.c
+++ b/xen/arch/x86/hvm/svm/vpmu.c
@@ -169,7 +169,7 @@ static void amd_vpmu_unset_msr_bitmap(struct vcpu *v)
msr_bitmap_off(vpmu);
}
-static int amd_vpmu_do_interrupt(struct cpu_user_regs *regs)
+static int amd_vpmu_do_interrupt(const struct cpu_user_regs *regs)
{
return 1;
}
@@ -224,6 +224,7 @@ static inline void context_save(struct vcpu *v)
rdmsrl(counters[i], counter_regs[i]);
}
+/* Must be NMI-safe */
static int amd_vpmu_save(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 37bafea..10fd420 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -300,6 +300,7 @@ static inline void __core2_vpmu_save(struct vcpu *v)
rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, core2_vpmu_cxt->global_status);
}
+/* Must be NMI-safe */
static int core2_vpmu_save(struct vcpu *v)
{
struct vpmu_struct *vpmu = vcpu_vpmu(v);
@@ -707,7 +708,7 @@ static void core2_vpmu_dump(const struct vcpu *v)
}
}
-static int core2_vpmu_do_interrupt(struct cpu_user_regs *regs)
+static int core2_vpmu_do_interrupt(const struct cpu_user_regs *regs)
{
struct vcpu *v = current;
u64 msr_content;
diff --git a/xen/arch/x86/hvm/vpmu.c b/xen/arch/x86/hvm/vpmu.c
index 93842cd..42ac53f 100644
--- a/xen/arch/x86/hvm/vpmu.c
+++ b/xen/arch/x86/hvm/vpmu.c
@@ -34,6 +34,7 @@
#include <asm/hvm/svm/svm.h>
#include <asm/hvm/svm/vmcb.h>
#include <asm/apic.h>
+#include <asm/nmi.h>
#include <public/pmu.h>
#include <xen/tasklet.h>
@@ -53,27 +54,53 @@ uint64_t __read_mostly vpmu_features = 0;
static void parse_vpmu_param(char *s);
custom_param("vpmu", parse_vpmu_param);
+static void pmu_softnmi(void);
+
static DEFINE_PER_CPU(struct vcpu *, last_vcpu);
+static DEFINE_PER_CPU(struct vcpu *, sampled_vcpu);
+
+static uint32_t __read_mostly vpmu_interrupt_type = PMU_APIC_VECTOR;
static void __init parse_vpmu_param(char *s)
{
- switch ( parse_bool(s) )
- {
- case 0:
- break;
- default:
- if ( !strcmp(s, "bts") )
- vpmu_features |= XENPMU_FEATURE_INTEL_BTS;
- else if ( *s )
+ char *ss;
+
+ vpmu_mode = XENPMU_MODE_SELF;
+ if (*s == '\0')
+ return;
+
+ do {
+ ss = strchr(s, ',');
+ if ( ss )
+ *ss = '\0';
+
+ switch ( parse_bool(s) )
{
- printk("VPMU: unknown flag: %s - vpmu disabled!\n", s);
- break;
+ case 0:
+ vpmu_mode = XENPMU_MODE_OFF;
+ /* FALLTHROUGH */
+ case 1:
+ return;
+ default:
+ if ( !strcmp(s, "nmi") )
+ vpmu_interrupt_type = APIC_DM_NMI;
+ else if ( !strcmp(s, "bts") )
+ vpmu_features |= XENPMU_FEATURE_INTEL_BTS;
+ else if ( !strcmp(s, "all") )
+ {
+ vpmu_mode &= ~XENPMU_MODE_SELF;
+ vpmu_mode |= XENPMU_MODE_ALL;
+ }
+ else
+ {
+ printk("VPMU: unknown flag: %s - vpmu disabled!\n", s);
+ vpmu_mode = XENPMU_MODE_OFF;
+ return;
+ }
}
- /* fall through */
- case 1:
- vpmu_mode = XENPMU_MODE_SELF;
- break;
- }
+
+ s = ss + 1;
+ } while ( ss );
}
void vpmu_lvtpc_update(uint32_t val)
@@ -81,7 +108,7 @@ void vpmu_lvtpc_update(uint32_t val)
struct vcpu *curr = current;
struct vpmu_struct *vpmu = vcpu_vpmu(curr);
- vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | (val & APIC_LVT_MASKED);
+ vpmu->hw_lapic_lvtpc = vpmu_interrupt_type | (val & APIC_LVT_MASKED);
/* Postpone APIC updates for PV(H) guests if PMU interrupt is pending */
if ( is_hvm_domain(curr->domain) ||
@@ -89,6 +116,24 @@ void vpmu_lvtpc_update(uint32_t val)
apic_write(APIC_LVTPC, vpmu->hw_lapic_lvtpc);
}
+static void vpmu_send_interrupt(struct vcpu *v)
+{
+ struct vlapic *vlapic;
+ u32 vlapic_lvtpc;
+
+ ASSERT( is_hvm_vcpu(v) );
+
+ vlapic = vcpu_vlapic(v);
+ if ( !is_vlapic_lvtpc_enabled(vlapic) )
+ return;
+
+ vlapic_lvtpc = vlapic_get_reg(vlapic, APIC_LVTPC);
+ if ( GET_APIC_DELIVERY_MODE(vlapic_lvtpc) == APIC_MODE_FIXED )
+ vlapic_set_irq(vcpu_vlapic(v), vlapic_lvtpc & APIC_VECTOR_MASK, 0);
+ else
+ v->nmi_pending = 1;
+}
+
int vpmu_do_msr(unsigned int msr, uint64_t *msr_content,
uint64_t supported, int rw)
{
@@ -157,7 +202,8 @@ static struct vcpu *choose_hwdom_vcpu(void)
return v;
}
-int vpmu_do_interrupt(struct cpu_user_regs *regs)
+/* This routine may be called in NMI context */
+int vpmu_do_interrupt(const struct cpu_user_regs *regs)
{
struct vcpu *sampled = current, *sampling;
struct vpmu_struct *vpmu;
@@ -234,8 +280,9 @@ int vpmu_do_interrupt(struct cpu_user_regs *regs)
if ( sampled->arch.flags & TF_kernel_mode )
sampling->arch.vpmu.xenpmu_data->pmu.r.regs.cs &= ~3;
}
- else
+ else if ( !(vpmu_interrupt_type & APIC_DM_NMI) )
{
+ /* Unsafe in NMI context, defer to softint later */
struct segment_register seg_cs;
hvm_get_segment_register(sampled, x86_seg_cs, &seg_cs);
@@ -250,8 +297,12 @@ int vpmu_do_interrupt(struct cpu_user_regs *regs)
gregs = guest_cpu_user_regs();
vpmu->xenpmu_data->pmu.r.regs = *gregs;
- hvm_get_segment_register(sampled, x86_seg_cs, &seg_cs);
- sampling->arch.vpmu.xenpmu_data->pmu.r.regs.cs = seg_cs.sel;
+ /* This is unsafe in NMI context, we'll do it in softint handler */
+ if ( !(vpmu_interrupt_type & APIC_DM_NMI ) )
+ {
+ hvm_get_segment_register(sampled, x86_seg_cs, &seg_cs);
+ sampling->arch.vpmu.xenpmu_data->pmu.r.regs.cs = seg_cs.sel;
+ }
}
vpmu->xenpmu_data->domain_id = (sampled == sampling) ?
@@ -264,30 +315,30 @@ int vpmu_do_interrupt(struct cpu_user_regs *regs)
apic_write(APIC_LVTPC, vpmu->hw_lapic_lvtpc | APIC_LVT_MASKED);
vpmu->hw_lapic_lvtpc |= APIC_LVT_MASKED;
- send_guest_vcpu_virq(sampling, VIRQ_XENPMU);
+ if ( vpmu_interrupt_type & APIC_DM_NMI )
+ {
+ this_cpu(sampled_vcpu) = sampled;
+ raise_softirq(PMU_SOFTIRQ);
+ }
+ else
+ send_guest_vcpu_virq(sampling, VIRQ_XENPMU);
return 1;
}
if ( vpmu->arch_vpmu_ops )
{
- struct vlapic *vlapic = vcpu_vlapic(sampling);
- u32 vlapic_lvtpc;
- unsigned char int_vec;
-
if ( !vpmu->arch_vpmu_ops->do_interrupt(regs) )
return 0;
- if ( !is_vlapic_lvtpc_enabled(vlapic) )
- return 1;
-
- vlapic_lvtpc = vlapic_get_reg(vlapic, APIC_LVTPC);
- int_vec = vlapic_lvtpc & APIC_VECTOR_MASK;
-
- if ( GET_APIC_DELIVERY_MODE(vlapic_lvtpc) == APIC_MODE_FIXED )
- vlapic_set_irq(vcpu_vlapic(sampling), int_vec, 0);
+ if ( vpmu_interrupt_type & APIC_DM_NMI )
+ {
+ this_cpu(sampled_vcpu) = sampled;
+ raise_softirq(PMU_SOFTIRQ);
+ }
else
- sampling->nmi_pending = 1;
+ vpmu_send_interrupt(sampling);
+
return 1;
}
@@ -320,6 +371,8 @@ static void vpmu_save_force(void *arg)
vpmu_reset(vpmu, VPMU_CONTEXT_SAVE);
per_cpu(last_vcpu, smp_processor_id()) = NULL;
+
+ pmu_softnmi();
}
void vpmu_save(struct vcpu *v)
@@ -337,7 +390,10 @@ void vpmu_save(struct vcpu *v)
if ( vpmu->arch_vpmu_ops->arch_vpmu_save(v) )
vpmu_reset(vpmu, VPMU_CONTEXT_LOADED);
- apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED);
+ apic_write(APIC_LVTPC, vpmu_interrupt_type | APIC_LVT_MASKED);
+
+ /* Make sure there are no outstanding PMU NMIs */
+ pmu_softnmi();
}
void vpmu_load(struct vcpu *v)
@@ -391,6 +447,8 @@ void vpmu_load(struct vcpu *v)
vpmu->xenpmu_data->pmu_flags & PMU_CACHED) )
return;
+ pmu_softnmi();
+
if ( vpmu->arch_vpmu_ops && vpmu->arch_vpmu_ops->arch_vpmu_load )
{
apic_write_around(APIC_LVTPC, vpmu->hw_lapic_lvtpc);
@@ -411,7 +469,7 @@ void vpmu_initialise(struct vcpu *v)
vpmu_destroy(v);
vpmu_clear(vpmu);
vpmu->context = NULL;
- vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED;
+ vpmu->hw_lapic_lvtpc = vpmu_interrupt_type | APIC_LVT_MASKED;
switch ( vendor )
{
@@ -447,11 +505,55 @@ void vpmu_destroy(struct vcpu *v)
}
}
+/* Process the softirq set by PMU NMI handler */
+static void pmu_softnmi(void)
+{
+ struct vcpu *v, *sampled = this_cpu(sampled_vcpu);
+
+ if ( sampled == NULL )
+ return;
+ this_cpu(sampled_vcpu) = NULL;
+
+ if ( (vpmu_mode & XENPMU_MODE_ALL) ||
+ (sampled->domain->domain_id >= DOMID_FIRST_RESERVED) )
+ {
+ v = choose_hwdom_vcpu();
+ if ( !v )
+ return;
+ }
+ else
+ {
+ if ( is_hvm_domain(sampled->domain) )
+ {
+ vpmu_send_interrupt(sampled);
+ return;
+ }
+ v = sampled;
+ }
+
+ if ( has_hvm_container_domain(sampled->domain) )
+ {
+ struct segment_register seg_cs;
+
+ hvm_get_segment_register(sampled, x86_seg_cs, &seg_cs);
+ v->arch.vpmu.xenpmu_data->pmu.r.regs.cs = seg_cs.sel;
+ }
+
+ send_guest_vcpu_virq(v, VIRQ_XENPMU);
+}
+
+int pmu_nmi_interrupt(const struct cpu_user_regs *regs, int cpu)
+{
+ return vpmu_do_interrupt(regs);
+}
+
static int pvpmu_init(struct domain *d, xen_pmu_params_t *params)
{
struct vcpu *v;
struct page_info *page;
uint64_t gfn = params->val;
+ static bool_t __read_mostly pvpmu_init_done;
+ static DEFINE_SPINLOCK(init_lock);
if ( (params->vcpu >= d->max_vcpus) || (d->vcpu == NULL) ||
(d->vcpu[params->vcpu] == NULL) )
@@ -475,6 +577,27 @@ static int pvpmu_init(struct domain *d, xen_pmu_params_t *params)
return -EINVAL;
}
+ spin_lock(&init_lock);
+
+ if ( !pvpmu_init_done )
+ {
+ if ( reserve_lapic_nmi() != 0 )
+ {
+ spin_unlock(&init_lock);
+ printk(XENLOG_G_ERR "Failed to reserve PMU NMI\n");
+ put_page(page);
+ return -EBUSY;
+ }
+
+ set_nmi_callback(pmu_nmi_interrupt);
+
+ open_softirq(PMU_SOFTIRQ, pmu_softnmi);
+
+ pvpmu_init_done = 1;
+ }
+
+ spin_unlock(&init_lock);
+
vpmu_initialise(v);
return 0;
diff --git a/xen/include/asm-x86/hvm/vpmu.h b/xen/include/asm-x86/hvm/vpmu.h
index ad86390..2144b7f 100644
--- a/xen/include/asm-x86/hvm/vpmu.h
+++ b/xen/include/asm-x86/hvm/vpmu.h
@@ -42,7 +42,7 @@ struct arch_vpmu_ops {
int (*do_wrmsr)(unsigned int msr, uint64_t msr_content,
uint64_t supported);
int (*do_rdmsr)(unsigned int msr, uint64_t *msr_content);
- int (*do_interrupt)(struct cpu_user_regs *regs);
+ int (*do_interrupt)(const struct cpu_user_regs *regs);
void (*do_cpuid)(unsigned int input,
unsigned int *eax, unsigned int *ebx,
unsigned int *ecx, unsigned int *edx);
@@ -101,7 +101,7 @@ static inline bool_t vpmu_are_all_set(const struct vpmu_struct *vpmu,
void vpmu_lvtpc_update(uint32_t val);
int vpmu_do_msr(unsigned int msr, uint64_t *msr_content,
uint64_t supported, int rw);
-int vpmu_do_interrupt(struct cpu_user_regs *regs);
+int vpmu_do_interrupt(const struct cpu_user_regs *regs);
void vpmu_do_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
unsigned int *ecx, unsigned int *edx);
void vpmu_initialise(struct vcpu *v);
diff --git a/xen/include/xen/softirq.h b/xen/include/xen/softirq.h
index 0c0d481..5829fa4 100644
--- a/xen/include/xen/softirq.h
+++ b/xen/include/xen/softirq.h
@@ -8,6 +8,7 @@ enum {
NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ,
RCU_SOFTIRQ,
TASKLET_SOFTIRQ,
+ PMU_SOFTIRQ,
NR_COMMON_SOFTIRQS
};
--
1.8.1.4
next prev parent reply other threads:[~2014-09-04 3:41 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-04 3:41 [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 01/20] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 02/20] x86/VPMU: Manage VPMU_CONTEXT_SAVE flag in vpmu_save_force() Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 03/20] x86/VPMU: Set MSR bitmaps only for HVM/PVH guests Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 04/20] x86/VPMU: Make vpmu macros a bit more efficient Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 05/20] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 06/20] vmx: Merge MSR management routines Boris Ostrovsky
2014-09-08 16:07 ` Jan Beulich
2014-09-08 17:28 ` Boris Ostrovsky
2014-09-09 9:11 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 07/20] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 08/20] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 09/20] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-09-10 14:45 ` Jan Beulich
2014-09-10 17:23 ` Boris Ostrovsky
2014-09-11 6:39 ` Jan Beulich
2014-09-11 13:54 ` Boris Ostrovsky
2014-09-11 14:55 ` Jan Beulich
2014-09-11 15:26 ` Boris Ostrovsky
2014-09-11 15:59 ` Jan Beulich
2014-09-11 16:51 ` Boris Ostrovsky
2014-09-12 6:50 ` Jan Beulich
2014-09-12 14:21 ` Boris Ostrovsky
2014-09-12 14:38 ` Jan Beulich
2014-09-12 15:18 ` Boris Ostrovsky
2014-09-15 11:56 ` Konrad Rzeszutek Wilk
2014-09-15 13:06 ` Jan Beulich
2014-09-16 1:00 ` Boris Ostrovsky
2014-09-16 0:49 ` Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 10/20] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 11/20] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-09-10 15:05 ` Jan Beulich
2014-09-10 17:37 ` Boris Ostrovsky
2014-09-11 6:44 ` Jan Beulich
2014-09-11 14:12 ` Boris Ostrovsky
2014-09-11 14:59 ` Jan Beulich
2014-09-11 16:10 ` Boris Ostrovsky
2014-09-12 6:49 ` Jan Beulich
2014-09-12 14:12 ` Boris Ostrovsky
2014-09-12 14:39 ` Jan Beulich
2014-09-12 15:03 ` Boris Ostrovsky
2014-09-12 15:30 ` Jan Beulich
2014-09-12 15:54 ` Boris Ostrovsky
2014-09-12 16:05 ` Jan Beulich
2014-09-12 11:41 ` Dietmar Hahn
2014-09-12 14:25 ` Boris Ostrovsky
2014-09-15 13:35 ` Dietmar Hahn
2014-09-18 4:11 ` Tian, Kevin
2014-09-18 21:50 ` Boris Ostrovsky
2014-09-19 6:51 ` Jan Beulich
2014-09-19 12:42 ` Boris Ostrovsky
2014-09-19 13:28 ` Jan Beulich
2014-09-22 22:29 ` Tian, Kevin
2014-09-22 22:32 ` Tian, Kevin
2014-09-22 22:48 ` Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 12/20] x86/VPMU: Initialize PMU for PV(H) guests Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 13/20] x86/VPMU: When handling MSR accesses, leave fault injection to callers Boris Ostrovsky
2014-09-18 5:01 ` Tian, Kevin
2014-09-04 3:41 ` [PATCH v10 14/20] x86/VPMU: Add support for PMU register handling on PV guests Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 15/20] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-09-10 15:30 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 16/20] x86/VPMU: Merge vpmu_rdmsr and vpmu_wrmsr Boris Ostrovsky
2014-09-10 15:33 ` Jan Beulich
2014-09-18 4:16 ` Tian, Kevin
2014-09-04 3:41 ` [PATCH v10 17/20] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-09-10 15:39 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 18/20] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-09-10 15:44 ` Jan Beulich
2014-09-04 3:41 ` Boris Ostrovsky [this message]
2014-09-04 3:41 ` [PATCH v10 20/20] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-09-10 15:48 ` Jan Beulich
2014-09-10 15:54 ` [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Jan Beulich
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