From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: jbeulich@suse.com, kevin.tian@intel.com,
suravee.suthikulpanit@amd.com, eddie.dong@intel.com,
Aravind.Gopalakrishnan@amd.com
Cc: keir@xen.org, andrew.cooper3@citrix.com, tim@xen.org,
xen-devel@lists.xen.org, jun.nakajima@intel.com,
boris.ostrovsky@oracle.com
Subject: [PATCH v10 03/20] x86/VPMU: Set MSR bitmaps only for HVM/PVH guests
Date: Wed, 3 Sep 2014 23:41:03 -0400 [thread overview]
Message-ID: <1409802080-6160-4-git-send-email-boris.ostrovsky@oracle.com> (raw)
In-Reply-To: <1409802080-6160-1-git-send-email-boris.ostrovsky@oracle.com>
In preparation for making VPMU code shared with PV make sure that we we update
MSR bitmaps only for HVM/PVH guests
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
---
xen/arch/x86/hvm/svm/vpmu.c | 21 +++++++++++++--------
xen/arch/x86/hvm/vmx/vpmu_core2.c | 8 +++++---
2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/xen/arch/x86/hvm/svm/vpmu.c b/xen/arch/x86/hvm/svm/vpmu.c
index 8e07a98..c7e0946 100644
--- a/xen/arch/x86/hvm/svm/vpmu.c
+++ b/xen/arch/x86/hvm/svm/vpmu.c
@@ -244,7 +244,8 @@ static int amd_vpmu_save(struct vcpu *v)
context_save(v);
- if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && ctx->msr_bitmap_set )
+ if ( !vpmu_is_set(vpmu, VPMU_RUNNING) &&
+ has_hvm_container_domain(v->domain) && ctx->msr_bitmap_set )
amd_vpmu_unset_msr_bitmap(v);
return 1;
@@ -287,8 +288,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
ASSERT(!supported);
/* For all counters, enable guest only mode for HVM guest */
- if ( (get_pmu_reg_type(msr) == MSR_TYPE_CTRL) &&
- !(is_guest_mode(msr_content)) )
+ if ( has_hvm_container_domain(v->domain) &&
+ (get_pmu_reg_type(msr) == MSR_TYPE_CTRL) &&
+ !is_guest_mode(msr_content) )
{
set_guest_mode(msr_content);
}
@@ -303,8 +305,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
apic_write(APIC_LVTPC, PMU_APIC_VECTOR);
vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR;
- if ( !((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
- amd_vpmu_set_msr_bitmap(v);
+ if ( has_hvm_container_domain(v->domain) &&
+ !((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
+ amd_vpmu_set_msr_bitmap(v);
}
/* stop saving & restore if guest stops first counter */
@@ -314,8 +317,9 @@ static int amd_vpmu_do_wrmsr(unsigned int msr, uint64_t msr_content,
apic_write(APIC_LVTPC, PMU_APIC_VECTOR | APIC_LVT_MASKED);
vpmu->hw_lapic_lvtpc = PMU_APIC_VECTOR | APIC_LVT_MASKED;
vpmu_reset(vpmu, VPMU_RUNNING);
- if ( ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
- amd_vpmu_unset_msr_bitmap(v);
+ if ( has_hvm_container_domain(v->domain) &&
+ ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
+ amd_vpmu_unset_msr_bitmap(v);
release_pmu_ownship(PMU_OWNER_HVM);
}
@@ -406,7 +410,8 @@ static void amd_vpmu_destroy(struct vcpu *v)
if ( !vpmu_is_set(vpmu, VPMU_CONTEXT_ALLOCATED) )
return;
- if ( ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
+ if ( has_hvm_container_domain(v->domain) &&
+ ((struct amd_vpmu_context *)vpmu->context)->msr_bitmap_set )
amd_vpmu_unset_msr_bitmap(v);
xfree(vpmu->context);
diff --git a/xen/arch/x86/hvm/vmx/vpmu_core2.c b/xen/arch/x86/hvm/vmx/vpmu_core2.c
index 56f5059..2c1fa0e 100644
--- a/xen/arch/x86/hvm/vmx/vpmu_core2.c
+++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c
@@ -335,7 +335,8 @@ static int core2_vpmu_save(struct vcpu *v)
__core2_vpmu_save(v);
/* Unset PMU MSR bitmap to trap lazy load. */
- if ( !vpmu_is_set(vpmu, VPMU_RUNNING) && cpu_has_vmx_msr_bitmap )
+ if ( !vpmu_is_set(vpmu, VPMU_RUNNING) &&
+ has_hvm_container_domain(v->domain) && cpu_has_vmx_msr_bitmap )
core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap);
return 1;
@@ -448,7 +449,8 @@ static int core2_vpmu_msr_common_check(u32 msr_index, int *type, int *index)
{
__core2_vpmu_load(current);
vpmu_set(vpmu, VPMU_CONTEXT_LOADED);
- if ( cpu_has_vmx_msr_bitmap )
+ if ( has_hvm_container_domain(current->domain) &&
+ cpu_has_vmx_msr_bitmap )
core2_vpmu_set_msr_bitmap(current->arch.hvm_vmx.msr_bitmap);
}
return 1;
@@ -822,7 +824,7 @@ static void core2_vpmu_destroy(struct vcpu *v)
return;
xfree(core2_vpmu_cxt->pmu_enable);
xfree(vpmu->context);
- if ( cpu_has_vmx_msr_bitmap )
+ if ( has_hvm_container_domain(v->domain) && cpu_has_vmx_msr_bitmap )
core2_vpmu_unset_msr_bitmap(v->arch.hvm_vmx.msr_bitmap);
release_pmu_ownship(PMU_OWNER_HVM);
vpmu_reset(vpmu, VPMU_CONTEXT_ALLOCATED);
--
1.8.1.4
next prev parent reply other threads:[~2014-09-04 3:41 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-04 3:41 [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 01/20] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 02/20] x86/VPMU: Manage VPMU_CONTEXT_SAVE flag in vpmu_save_force() Boris Ostrovsky
2014-09-04 3:41 ` Boris Ostrovsky [this message]
2014-09-04 3:41 ` [PATCH v10 04/20] x86/VPMU: Make vpmu macros a bit more efficient Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 05/20] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 06/20] vmx: Merge MSR management routines Boris Ostrovsky
2014-09-08 16:07 ` Jan Beulich
2014-09-08 17:28 ` Boris Ostrovsky
2014-09-09 9:11 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 07/20] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 08/20] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 09/20] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-09-10 14:45 ` Jan Beulich
2014-09-10 17:23 ` Boris Ostrovsky
2014-09-11 6:39 ` Jan Beulich
2014-09-11 13:54 ` Boris Ostrovsky
2014-09-11 14:55 ` Jan Beulich
2014-09-11 15:26 ` Boris Ostrovsky
2014-09-11 15:59 ` Jan Beulich
2014-09-11 16:51 ` Boris Ostrovsky
2014-09-12 6:50 ` Jan Beulich
2014-09-12 14:21 ` Boris Ostrovsky
2014-09-12 14:38 ` Jan Beulich
2014-09-12 15:18 ` Boris Ostrovsky
2014-09-15 11:56 ` Konrad Rzeszutek Wilk
2014-09-15 13:06 ` Jan Beulich
2014-09-16 1:00 ` Boris Ostrovsky
2014-09-16 0:49 ` Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 10/20] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 11/20] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-09-10 15:05 ` Jan Beulich
2014-09-10 17:37 ` Boris Ostrovsky
2014-09-11 6:44 ` Jan Beulich
2014-09-11 14:12 ` Boris Ostrovsky
2014-09-11 14:59 ` Jan Beulich
2014-09-11 16:10 ` Boris Ostrovsky
2014-09-12 6:49 ` Jan Beulich
2014-09-12 14:12 ` Boris Ostrovsky
2014-09-12 14:39 ` Jan Beulich
2014-09-12 15:03 ` Boris Ostrovsky
2014-09-12 15:30 ` Jan Beulich
2014-09-12 15:54 ` Boris Ostrovsky
2014-09-12 16:05 ` Jan Beulich
2014-09-12 11:41 ` Dietmar Hahn
2014-09-12 14:25 ` Boris Ostrovsky
2014-09-15 13:35 ` Dietmar Hahn
2014-09-18 4:11 ` Tian, Kevin
2014-09-18 21:50 ` Boris Ostrovsky
2014-09-19 6:51 ` Jan Beulich
2014-09-19 12:42 ` Boris Ostrovsky
2014-09-19 13:28 ` Jan Beulich
2014-09-22 22:29 ` Tian, Kevin
2014-09-22 22:32 ` Tian, Kevin
2014-09-22 22:48 ` Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 12/20] x86/VPMU: Initialize PMU for PV(H) guests Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 13/20] x86/VPMU: When handling MSR accesses, leave fault injection to callers Boris Ostrovsky
2014-09-18 5:01 ` Tian, Kevin
2014-09-04 3:41 ` [PATCH v10 14/20] x86/VPMU: Add support for PMU register handling on PV guests Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 15/20] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-09-10 15:30 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 16/20] x86/VPMU: Merge vpmu_rdmsr and vpmu_wrmsr Boris Ostrovsky
2014-09-10 15:33 ` Jan Beulich
2014-09-18 4:16 ` Tian, Kevin
2014-09-04 3:41 ` [PATCH v10 17/20] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-09-10 15:39 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 18/20] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-09-10 15:44 ` Jan Beulich
2014-09-04 3:41 ` [PATCH v10 19/20] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-09-04 3:41 ` [PATCH v10 20/20] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-09-10 15:48 ` Jan Beulich
2014-09-10 15:54 ` [PATCH v10 00/20] x86/PMU: Xen PMU PV(H) support Jan Beulich
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1409802080-6160-4-git-send-email-boris.ostrovsky@oracle.com \
--to=boris.ostrovsky@oracle.com \
--cc=Aravind.Gopalakrishnan@amd.com \
--cc=andrew.cooper3@citrix.com \
--cc=eddie.dong@intel.com \
--cc=jbeulich@suse.com \
--cc=jun.nakajima@intel.com \
--cc=keir@xen.org \
--cc=kevin.tian@intel.com \
--cc=suravee.suthikulpanit@amd.com \
--cc=tim@xen.org \
--cc=xen-devel@lists.xen.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).